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target/ppc: Add HV support to ppc_interrupts_little_endian 

The ppc_interrupts_little_endian function could be used for interrupts
delivered in Hypervisor mode, so add support for powernv8 and powernv9
to it.

Also drop the comment because it is inaccurate, all CPUs that can run
little endian can have interrupts in little endian. The point is
whether they can take interrupts in an endianness different from
MSR_LE.

This change has no functional impact.

Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20220107222601.4101511-5-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Fabiano Rosas 2022-01-12 11:28:27 +01:00 committed by Cédric Le Goater
parent 4dff75fe95
commit 516fc1036b
3 changed files with 17 additions and 10 deletions
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2
target/ppc/arch_dump.c
View File

@ -237,7 +237,7 @@ int cpu_get_dump_info(ArchDumpInfo *info,
info->d_machine = PPC_ELF_MACHINE;
info->d_class = ELFCLASS;
if (ppc_interrupts_little_endian(cpu)) {
if (ppc_interrupts_little_endian(cpu, false)) {
info->d_endian = ELFDATA2LSB;
} else {
info->d_endian = ELFDATA2MSB;

23
target/ppc/cpu.h
View File

@ -2728,20 +2728,27 @@ static inline bool ppc_has_spr(PowerPCCPU *cpu, int spr)
return cpu->env.spr_cb[spr].name != NULL;
}
static inline bool ppc_interrupts_little_endian(PowerPCCPU *cpu)
#if !defined(CONFIG_USER_ONLY)
static inline bool ppc_interrupts_little_endian(PowerPCCPU *cpu, bool hv)
{
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
CPUPPCState *env = &cpu->env;
bool ile = false;
/*
* Only models that have an LPCR and know about LPCR_ILE can do little
* endian.
*/
if (pcc->lpcr_mask & LPCR_ILE) {
return !!(cpu->env.spr[SPR_LPCR] & LPCR_ILE);
if (hv && env->has_hv_mode) {
if (is_isa300(pcc)) {
ile = !!(env->spr[SPR_HID0] & HID0_POWER9_HILE);
} else {
ile = !!(env->spr[SPR_HID0] & HID0_HILE);
}
} else if (pcc->lpcr_mask & LPCR_ILE) {
ile = !!(env->spr[SPR_LPCR] & LPCR_ILE);
}
return false;
return ile;
}
#endif
void dump_mmu(CPUPPCState *env);

2
target/ppc/excp_helper.c
View File

@ -1070,7 +1070,7 @@ void ppc_cpu_do_fwnmi_machine_check(CPUState *cs, target_ulong vector)
*/
msr = (1ULL << MSR_ME);
msr |= env->msr & (1ULL << MSR_SF);
if (ppc_interrupts_little_endian(cpu)) {
if (ppc_interrupts_little_endian(cpu, false)) {
msr |= (1ULL << MSR_LE);
}