target/mips: Make mips_cpu_tlb_fill sysemu only
The fallback code in cpu_loop_exit_sigsegv is sufficient for mips linux-user. This means we can remove tcg/user/tlb_helper.c entirely. Remove the code from cpu_loop that raised SIGSEGV. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -158,17 +158,6 @@ done_syscall:
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}
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env->active_tc.gpr[2] = ret;
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break;
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case EXCP_TLBL:
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case EXCP_TLBS:
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case EXCP_AdEL:
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case EXCP_AdES:
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info.si_signo = TARGET_SIGSEGV;
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info.si_errno = 0;
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/* XXX: check env->error_code */
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info.si_code = TARGET_SEGV_MAPERR;
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info._sifields._sigfault._addr = env->CP0_BadVAddr;
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case EXCP_CpU:
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case EXCP_RI:
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info.si_signo = TARGET_SIGILL;
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@ -539,9 +539,9 @@ static const struct SysemuCPUOps mips_sysemu_ops = {
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static const struct TCGCPUOps mips_tcg_ops = {
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.initialize = mips_tcg_init,
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.synchronize_from_tb = mips_cpu_synchronize_from_tb,
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.tlb_fill = mips_cpu_tlb_fill,
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#if !defined(CONFIG_USER_ONLY)
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.tlb_fill = mips_cpu_tlb_fill,
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.cpu_exec_interrupt = mips_cpu_exec_interrupt,
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.do_interrupt = mips_cpu_do_interrupt,
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.do_transaction_failed = mips_cpu_do_transaction_failed,
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@ -28,9 +28,6 @@ mips_ss.add(when: 'TARGET_MIPS64', if_true: files(
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'mxu_translate.c',
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))
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if have_user
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subdir('user')
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endif
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if have_system
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subdir('sysemu')
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endif
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@ -18,9 +18,6 @@
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void mips_tcg_init(void);
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void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
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bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
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MMUAccessType access_type, int mmu_idx,
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uintptr_t retaddr) QEMU_NORETURN;
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@ -60,6 +57,10 @@ void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
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MemTxResult response, uintptr_t retaddr);
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void cpu_mips_tlb_flush(CPUMIPSState *env);
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bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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#endif /* !CONFIG_USER_ONLY */
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#endif
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@ -1,3 +0,0 @@
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mips_user_ss.add(files(
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'tlb_helper.c',
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))
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@ -1,59 +0,0 @@
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/*
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* MIPS TLB (Translation lookaside buffer) helpers.
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*
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* Copyright (c) 2004-2005 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/exec-all.h"
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#include "internal.h"
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static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
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MMUAccessType access_type)
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{
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CPUState *cs = env_cpu(env);
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env->error_code = 0;
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if (access_type == MMU_INST_FETCH) {
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env->error_code |= EXCP_INST_NOTAVAIL;
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}
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/* Reference to kernel address from user mode or supervisor mode */
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/* Reference to supervisor address from user mode */
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if (access_type == MMU_DATA_STORE) {
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cs->exception_index = EXCP_AdES;
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} else {
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cs->exception_index = EXCP_AdEL;
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}
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/* Raise exception */
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if (!(env->hflags & MIPS_HFLAG_DM)) {
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env->CP0_BadVAddr = address;
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}
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}
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bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr)
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{
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MIPSCPU *cpu = MIPS_CPU(cs);
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CPUMIPSState *env = &cpu->env;
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/* data access */
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raise_mmu_exception(env, address, access_type);
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do_raise_exception_err(env, cs->exception_index, env->error_code, retaddr);
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}
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