target-i386: Move APIC to ICC bus

It allows APIC to be hotplugged.

 * map APIC's mmio at board level if it is present
 * do not register mmio region for each APIC, since
   only one is used/mapped

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Igor Mammedov 2013-04-29 19:03:01 +02:00 committed by Andreas Färber
parent 62fc403f11
commit 53a89e262b
6 changed files with 42 additions and 24 deletions

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@ -80,6 +80,7 @@ typedef struct ICCBridgeState {
/*< public >*/ /*< public >*/
ICCBus icc_bus; ICCBus icc_bus;
MemoryRegion apic_container;
} ICCBridgeState; } ICCBridgeState;
#define ICC_BRIGDE(obj) OBJECT_CHECK(ICCBridgeState, (obj), TYPE_ICC_BRIDGE) #define ICC_BRIGDE(obj) OBJECT_CHECK(ICCBridgeState, (obj), TYPE_ICC_BRIDGE)
@ -87,8 +88,17 @@ typedef struct ICCBridgeState {
static void icc_bridge_init(Object *obj) static void icc_bridge_init(Object *obj)
{ {
ICCBridgeState *s = ICC_BRIGDE(obj); ICCBridgeState *s = ICC_BRIGDE(obj);
SysBusDevice *sb = SYS_BUS_DEVICE(obj);
qbus_create_inplace(&s->icc_bus, TYPE_ICC_BUS, DEVICE(s), "icc"); qbus_create_inplace(&s->icc_bus, TYPE_ICC_BUS, DEVICE(s), "icc");
/* Do not change order of registering regions,
* APIC must be first registered region, board maps it by 0 index
*/
memory_region_init(&s->apic_container, "icc-apic-container",
APIC_SPACE_SIZE);
sysbus_init_mmio(sb, &s->apic_container);
s->icc_bus.apic_address_space = &s->apic_container;
} }
static const TypeInfo icc_bridge_info = { static const TypeInfo icc_bridge_info = {

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@ -53,6 +53,7 @@
#include "qemu/bitmap.h" #include "qemu/bitmap.h"
#include "qemu/config-file.h" #include "qemu/config-file.h"
#include "hw/acpi/acpi.h" #include "hw/acpi/acpi.h"
#include "hw/cpu/icc_bus.h"
/* debug PC/ISA interrupts */ /* debug PC/ISA interrupts */
//#define DEBUG_IRQ //#define DEBUG_IRQ
@ -921,6 +922,7 @@ static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id,
void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge) void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
{ {
int i; int i;
X86CPU *cpu = NULL;
Error *error = NULL; Error *error = NULL;
/* init CPUs */ /* init CPUs */
@ -933,14 +935,21 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
} }
for (i = 0; i < smp_cpus; i++) { for (i = 0; i < smp_cpus; i++) {
pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i), cpu = pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i),
icc_bridge, &error); icc_bridge, &error);
if (error) { if (error) {
fprintf(stderr, "%s\n", error_get_pretty(error)); fprintf(stderr, "%s\n", error_get_pretty(error));
error_free(error); error_free(error);
exit(1); exit(1);
} }
} }
/* map APIC MMIO area if CPU has APIC */
if (cpu && cpu->env.apic_state) {
/* XXX: what if the base changes? */
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0,
APIC_DEFAULT_ADDRESS, 0x1000);
}
} }
void pc_acpi_init(const char *default_dsdt) void pc_acpi_init(const char *default_dsdt)

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@ -21,6 +21,8 @@
#include "hw/i386/apic_internal.h" #include "hw/i386/apic_internal.h"
#include "trace.h" #include "trace.h"
#include "sysemu/kvm.h" #include "sysemu/kvm.h"
#include "hw/qdev.h"
#include "hw/sysbus.h"
static int apic_irq_delivered; static int apic_irq_delivered;
bool apic_report_tpr_access; bool apic_report_tpr_access;
@ -282,12 +284,13 @@ static int apic_load_old(QEMUFile *f, void *opaque, int version_id)
return 0; return 0;
} }
static int apic_init_common(SysBusDevice *dev) static int apic_init_common(ICCDevice *dev)
{ {
APICCommonState *s = APIC_COMMON(dev); APICCommonState *s = APIC_COMMON(dev);
APICCommonClass *info; APICCommonClass *info;
static DeviceState *vapic; static DeviceState *vapic;
static int apic_no; static int apic_no;
static bool mmio_registered;
if (apic_no >= MAX_APICS) { if (apic_no >= MAX_APICS) {
return -1; return -1;
@ -296,8 +299,11 @@ static int apic_init_common(SysBusDevice *dev)
info = APIC_COMMON_GET_CLASS(s); info = APIC_COMMON_GET_CLASS(s);
info->init(s); info->init(s);
if (!mmio_registered) {
sysbus_init_mmio(dev, &s->io_memory); ICCBus *b = ICC_BUS(qdev_get_parent_bus(DEVICE(dev)));
memory_region_add_subregion(b->apic_address_space, 0, &s->io_memory);
mmio_registered = true;
}
/* Note: We need at least 1M to map the VAPIC option ROM */ /* Note: We need at least 1M to map the VAPIC option ROM */
if (!vapic && s->vapic_control & VAPIC_ENABLE_MASK && if (!vapic && s->vapic_control & VAPIC_ENABLE_MASK &&
@ -375,19 +381,19 @@ static Property apic_properties_common[] = {
static void apic_common_class_init(ObjectClass *klass, void *data) static void apic_common_class_init(ObjectClass *klass, void *data)
{ {
SysBusDeviceClass *sc = SYS_BUS_DEVICE_CLASS(klass); ICCDeviceClass *idc = ICC_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_apic_common; dc->vmsd = &vmstate_apic_common;
dc->reset = apic_reset_common; dc->reset = apic_reset_common;
dc->no_user = 1; dc->no_user = 1;
dc->props = apic_properties_common; dc->props = apic_properties_common;
sc->init = apic_init_common; idc->init = apic_init_common;
} }
static const TypeInfo apic_common_type = { static const TypeInfo apic_common_type = {
.name = TYPE_APIC_COMMON, .name = TYPE_APIC_COMMON,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_ICC_DEVICE,
.instance_size = sizeof(APICCommonState), .instance_size = sizeof(APICCommonState),
.class_size = sizeof(APICCommonClass), .class_size = sizeof(APICCommonClass),
.class_init = apic_common_class_init, .class_init = apic_common_class_init,

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@ -22,6 +22,7 @@
#ifndef ICC_BUS_H #ifndef ICC_BUS_H
#define ICC_BUS_H #define ICC_BUS_H
#include "exec/memory.h"
#include "hw/qdev-core.h" #include "hw/qdev-core.h"
#define TYPE_ICC_BUS "icc-bus" #define TYPE_ICC_BUS "icc-bus"
@ -37,6 +38,8 @@ typedef struct ICCBus {
/*< private >*/ /*< private >*/
BusState parent_obj; BusState parent_obj;
/*< public >*/ /*< public >*/
MemoryRegion *apic_address_space;
} ICCBus; } ICCBus;
#define ICC_BUS(obj) OBJECT_CHECK(ICCBus, (obj), TYPE_ICC_BUS) #define ICC_BUS(obj) OBJECT_CHECK(ICCBus, (obj), TYPE_ICC_BUS)

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@ -21,7 +21,7 @@
#define QEMU_APIC_INTERNAL_H #define QEMU_APIC_INTERNAL_H
#include "exec/memory.h" #include "exec/memory.h"
#include "hw/sysbus.h" #include "hw/cpu/icc_bus.h"
#include "qemu/timer.h" #include "qemu/timer.h"
/* APIC Local Vector Table */ /* APIC Local Vector Table */
@ -78,7 +78,7 @@ typedef struct APICCommonState APICCommonState;
typedef struct APICCommonClass typedef struct APICCommonClass
{ {
SysBusDeviceClass parent_class; ICCDeviceClass parent_class;
void (*init)(APICCommonState *s); void (*init)(APICCommonState *s);
void (*set_base)(APICCommonState *s, uint64_t val); void (*set_base)(APICCommonState *s, uint64_t val);
@ -92,7 +92,7 @@ typedef struct APICCommonClass
} APICCommonClass; } APICCommonClass;
struct APICCommonState { struct APICCommonState {
SysBusDevice busdev; ICCDevice busdev;
MemoryRegion io_memory; MemoryRegion io_memory;
X86CPU *cpu; X86CPU *cpu;

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@ -41,10 +41,10 @@
#endif #endif
#include "sysemu/sysemu.h" #include "sysemu/sysemu.h"
#include "hw/qdev-properties.h"
#include "hw/cpu/icc_bus.h" #include "hw/cpu/icc_bus.h"
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
#include "hw/xen/xen.h" #include "hw/xen/xen.h"
#include "hw/sysbus.h"
#include "hw/i386/apic_internal.h" #include "hw/i386/apic_internal.h"
#endif #endif
@ -2131,6 +2131,7 @@ static void mce_init(X86CPU *cpu)
static void x86_cpu_apic_create(X86CPU *cpu, Error **errp) static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
{ {
CPUX86State *env = &cpu->env; CPUX86State *env = &cpu->env;
DeviceState *dev = DEVICE(cpu);
APICCommonState *apic; APICCommonState *apic;
const char *apic_type = "apic"; const char *apic_type = "apic";
@ -2140,7 +2141,7 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
apic_type = "xen-apic"; apic_type = "xen-apic";
} }
env->apic_state = qdev_try_create(NULL, apic_type); env->apic_state = qdev_try_create(qdev_get_parent_bus(dev), apic_type);
if (env->apic_state == NULL) { if (env->apic_state == NULL) {
error_setg(errp, "APIC device '%s' could not be created", apic_type); error_setg(errp, "APIC device '%s' could not be created", apic_type);
return; return;
@ -2157,7 +2158,6 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
{ {
CPUX86State *env = &cpu->env; CPUX86State *env = &cpu->env;
static int apic_mapped;
if (env->apic_state == NULL) { if (env->apic_state == NULL) {
return; return;
@ -2168,16 +2168,6 @@ static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
object_get_typename(OBJECT(env->apic_state))); object_get_typename(OBJECT(env->apic_state)));
return; return;
} }
/* XXX: mapping more APICs at the same memory location */
if (apic_mapped == 0) {
/* NOTE: the APIC is directly connected to the CPU - it is not
on the global memory bus. */
/* XXX: what if the base changes? */
sysbus_mmio_map_overlap(SYS_BUS_DEVICE(env->apic_state), 0,
APIC_DEFAULT_ADDRESS, 0x1000);
apic_mapped = 1;
}
} }
#else #else
static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)