Sparc code generator update
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5009 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
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bc352085d2
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53c3748794
@ -137,8 +137,13 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
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case 'L': /* qemu_ld/st constraint */
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ct->ct |= TCG_CT_REG;
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tcg_regset_set32(ct->u.regs, 0, 0xffffffff);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_I0);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_I1);
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// Helper args
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_O0);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_O1);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_O2);
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// Internal use
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_L0);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1);
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break;
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case 'I':
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ct->ct |= TCG_CT_CONST_S11;
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@ -290,7 +295,7 @@ static inline void tcg_out_movi_imm13(TCGContext *s, int ret, uint32_t arg)
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static inline void tcg_out_movi_imm32(TCGContext *s, int ret, uint32_t arg)
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{
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if (check_fit_i32(arg, 13))
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if (check_fit_i32(arg, 12))
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tcg_out_movi_imm13(s, ret, arg);
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else {
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tcg_out_sethi(s, ret, arg);
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@ -393,6 +398,18 @@ static inline void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
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}
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}
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static inline void tcg_out_andi(TCGContext *s, int reg, tcg_target_long val)
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{
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if (val != 0) {
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if (check_fit_tl(val, 13))
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tcg_out_arithi(s, reg, reg, val, ARITH_AND);
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else {
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tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_I5, val);
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tcg_out_arith(s, reg, reg, TCG_REG_I5, ARITH_AND);
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}
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}
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}
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static inline void tcg_out_nop(TCGContext *s)
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{
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tcg_out_sethi(s, TCG_REG_G0, 0);
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@ -480,9 +497,10 @@ static const void * const qemu_st_helpers[4] = {
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static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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int opc)
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{
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int addr_reg, data_reg, r0, r1, mem_index, s_bits, ld_op;
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int addr_reg, data_reg, r0, r1, arg0, arg1, mem_index, s_bits;
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int target_ld_op, host_ld_op;
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#if defined(CONFIG_SOFTMMU)
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uint8_t *label1_ptr, *label2_ptr;
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uint32_t *label1_ptr, *label2_ptr;
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#endif
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data_reg = *args++;
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@ -490,15 +508,24 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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mem_index = *args;
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s_bits = opc & 3;
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r0 = TCG_REG_I0;
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r1 = TCG_REG_I1;
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r0 = TCG_REG_L0;
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r1 = TCG_REG_L1;
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arg0 = TCG_REG_O0;
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arg1 = TCG_REG_O1;
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#if TARGET_LONG_BITS == 32
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ld_op = LDUW;
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target_ld_op = LDUW;
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#else
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ld_op = LDX;
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target_ld_op = LDX;
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#endif
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#ifdef __arch64__
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host_ld_op = LDX;
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#else
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host_ld_op = LDUW;
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#endif
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#if defined(CONFIG_SOFTMMU)
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/* srl addr_reg, x, r1 */
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tcg_out_arithi(s, r1, addr_reg, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS,
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@ -508,56 +535,59 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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ARITH_AND);
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/* and r1, x, r1 */
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tcg_out_arithi(s, r1, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS,
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ARITH_AND);
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tcg_out_andi(s, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
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/* add r1, x, r1 */
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tcg_out_arithi(s, r1, r1, offsetof(CPUState, tlb_table[mem_index][0].addr_read),
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ARITH_ADD);
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tcg_out_addi(s, r1, offsetof(CPUState, tlb_table[mem_index][0].addr_read));
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/* ld [env + r1], r1 */
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tcg_out_ldst(s, r1, TCG_AREG0, r1, ld_op);
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/* add env, r1, r1 */
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tcg_out_arith(s, r1, TCG_AREG0, r1, ARITH_ADD);
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/* subcc r0, r1, %g0 */
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tcg_out_arith(s, TCG_REG_G0, r0, r1, ARITH_SUBCC);
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/* ld [r1], arg1 */
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tcg_out32(s, target_ld_op | INSN_RD(arg1) | INSN_RS1(r1) | INSN_RS2(TCG_REG_G0));
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/* subcc r0, arg1, %g0 */
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tcg_out_arith(s, TCG_REG_G0, r0, arg1, ARITH_SUBCC);
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/* will become:
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be label1 */
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label1_ptr = s->code_ptr;
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label1_ptr = (uint32_t *)s->code_ptr;
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tcg_out32(s, 0);
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/* mov (delay slot)*/
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tcg_out_mov(s, r0, addr_reg);
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/* mov (delay slot) */
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tcg_out_mov(s, arg0, addr_reg);
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/* XXX: move that code at the end of the TB */
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/* qemu_ld_helper[s_bits](arg0, arg1) */
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tcg_out32(s, CALL | ((((tcg_target_ulong)qemu_ld_helpers[s_bits]
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- (tcg_target_ulong)s->code_ptr) >> 2)
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& 0x3fffffff));
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/* mov (delay slot)*/
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tcg_out_movi(s, TCG_TYPE_I32, r1, mem_index);
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/* mov (delay slot) */
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tcg_out_movi(s, TCG_TYPE_I32, arg1, mem_index);
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/* data_reg = sign_extend(arg0) */
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switch(opc) {
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case 0 | 4:
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/* sll i0, 24/56, i0 */
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tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0,
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sizeof(tcg_target_long) * 8 - 8, SHIFT_SLL);
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/* sra i0, 24/56, data_reg */
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tcg_out_arithi(s, data_reg, TCG_REG_I0,
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sizeof(tcg_target_long) * 8 - 8, SHIFT_SRA);
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/* sll arg0, 24/56, data_reg */
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tcg_out_arithi(s, data_reg, arg0, sizeof(tcg_target_long) * 8 - 8,
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SHIFT_SLL);
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/* sra data_reg, 24/56, data_reg */
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tcg_out_arithi(s, data_reg, data_reg, sizeof(tcg_target_long) * 8 - 8,
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SHIFT_SRA);
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break;
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case 1 | 4:
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/* sll i0, 16/48, i0 */
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tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0,
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sizeof(tcg_target_long) * 8 - 16, SHIFT_SLL);
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/* sra i0, 16/48, data_reg */
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tcg_out_arithi(s, data_reg, TCG_REG_I0,
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sizeof(tcg_target_long) * 8 - 16, SHIFT_SRA);
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/* sll arg0, 16/48, data_reg */
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tcg_out_arithi(s, data_reg, arg0, sizeof(tcg_target_long) * 8 - 16,
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SHIFT_SLL);
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/* sra data_reg, 16/48, data_reg */
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tcg_out_arithi(s, data_reg, data_reg, sizeof(tcg_target_long) * 8 - 16,
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SHIFT_SRA);
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break;
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case 2 | 4:
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/* sll i0, 32, i0 */
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tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0, 32, SHIFT_SLL);
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/* sra i0, 32, data_reg */
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tcg_out_arithi(s, data_reg, TCG_REG_I0, 32, SHIFT_SRA);
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/* sll arg0, 32, data_reg */
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tcg_out_arithi(s, data_reg, arg0, 32, SHIFT_SLL);
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/* sra data_reg, 32, data_reg */
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tcg_out_arithi(s, data_reg, data_reg, 32, SHIFT_SRA);
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break;
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case 0:
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case 1:
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@ -565,24 +595,27 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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case 3:
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default:
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/* mov */
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tcg_out_mov(s, data_reg, TCG_REG_I0);
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tcg_out_mov(s, data_reg, arg0);
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break;
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}
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/* will become:
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ba label2 */
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label2_ptr = s->code_ptr;
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label2_ptr = (uint32_t *)s->code_ptr;
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tcg_out32(s, 0);
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/* nop (delay slot */
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tcg_out_nop(s);
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/* label1: */
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*label1_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) |
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INSN_OFF22((unsigned long)label1_ptr -
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(unsigned long)s->code_ptr));
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*label1_ptr = (INSN_OP(0) | INSN_COND(COND_E, 0) | INSN_OP2(0x2) |
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INSN_OFF22((unsigned long)s->code_ptr -
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(unsigned long)label1_ptr));
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/* ld [r1 + x], r1 */
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tcg_out_ldst(s, r1, r1, offsetof(CPUTLBEntry, addend) -
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offsetof(CPUTLBEntry, addr_read), ld_op);
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/* add x(r1), r0 */
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offsetof(CPUTLBEntry, addr_read), host_ld_op);
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/* add r0, r1, r0 */
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tcg_out_arith(s, r0, r1, r0, ARITH_ADD);
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#else
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r0 = addr_reg;
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@ -649,17 +682,18 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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#if defined(CONFIG_SOFTMMU)
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/* label2: */
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*label2_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) |
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INSN_OFF22((unsigned long)label2_ptr -
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(unsigned long)s->code_ptr));
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INSN_OFF22((unsigned long)s->code_ptr -
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(unsigned long)label2_ptr));
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#endif
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}
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static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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int opc)
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{
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int addr_reg, data_reg, r0, r1, mem_index, s_bits, ld_op;
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int addr_reg, data_reg, r0, r1, arg0, arg1, arg2, mem_index, s_bits;
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int target_ld_op, host_ld_op;
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#if defined(CONFIG_SOFTMMU)
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uint8_t *label1_ptr, *label2_ptr;
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uint32_t *label1_ptr, *label2_ptr;
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#endif
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data_reg = *args++;
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@ -668,67 +702,77 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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s_bits = opc;
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r0 = TCG_REG_I5;
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r1 = TCG_REG_I4;
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r0 = TCG_REG_L0;
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r1 = TCG_REG_L1;
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arg0 = TCG_REG_O0;
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arg1 = TCG_REG_O1;
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arg2 = TCG_REG_O2;
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#if TARGET_LONG_BITS == 32
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ld_op = LDUW;
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target_ld_op = LDUW;
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#else
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ld_op = LDX;
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target_ld_op = LDX;
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#endif
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#ifdef __arch64__
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host_ld_op = LDX;
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#else
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host_ld_op = LDUW;
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#endif
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#if defined(CONFIG_SOFTMMU)
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/* srl addr_reg, x, r1 */
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tcg_out_arithi(s, r1, addr_reg, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS,
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SHIFT_SRL);
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/* and addr_reg, x, r0 */
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tcg_out_arithi(s, r0, addr_reg, TARGET_PAGE_MASK | ((1 << s_bits) - 1),
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ARITH_AND);
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/* and r1, x, r1 */
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tcg_out_arithi(s, r1, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS,
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ARITH_AND);
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tcg_out_andi(s, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
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/* add r1, x, r1 */
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tcg_out_arithi(s, r1, r1,
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offsetof(CPUState, tlb_table[mem_index][0].addr_write),
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ARITH_ADD);
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tcg_out_addi(s, r1, offsetof(CPUState, tlb_table[mem_index][0].addr_write));
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/* ld [env + r1], r1 */
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tcg_out_ldst(s, r1, TCG_AREG0, r1, ld_op);
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/* add env, r1, r1 */
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tcg_out_arith(s, r1, TCG_AREG0, r1, ARITH_ADD);
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/* subcc r0, r1, %g0 */
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tcg_out_arith(s, TCG_REG_G0, r0, r1, ARITH_SUBCC);
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/* ld [r1], arg1 */
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tcg_out32(s, target_ld_op | INSN_RD(arg1) | INSN_RS1(r1) | INSN_RS2(TCG_REG_G0));
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/* subcc r0, arg1, %g0 */
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tcg_out_arith(s, TCG_REG_G0, r0, arg1, ARITH_SUBCC);
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/* will become:
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be label1 */
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label1_ptr = s->code_ptr;
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label1_ptr = (uint32_t *)s->code_ptr;
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tcg_out32(s, 0);
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/* mov (delay slot)*/
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tcg_out_mov(s, r0, addr_reg);
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/* mov (delay slot) */
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tcg_out_mov(s, arg0, addr_reg);
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/* arg1 = sign_extend(data_reg); */
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switch(opc) {
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case 0 | 4:
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/* sll i0, 24/56, i0 */
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tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0,
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sizeof(tcg_target_long) * 8 - 8, SHIFT_SLL);
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/* sra i0, 24/56, data_reg */
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tcg_out_arithi(s, data_reg, TCG_REG_I0,
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sizeof(tcg_target_long) * 8 - 8, SHIFT_SRA);
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/* sll data_reg, 24/56, arg1 */
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tcg_out_arithi(s, arg1, data_reg, sizeof(tcg_target_long) * 8 - 8, SHIFT_SLL);
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/* sra arg1, 24/56, arg1 */
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tcg_out_arithi(s, arg1, arg1, sizeof(tcg_target_long) * 8 - 8,
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SHIFT_SRA);
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break;
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case 1 | 4:
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/* sll i0, 16/48, i0 */
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tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0,
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sizeof(tcg_target_long) * 8 - 16, SHIFT_SLL);
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/* sra i0, 16/48, data_reg */
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tcg_out_arithi(s, data_reg, TCG_REG_I0,
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sizeof(tcg_target_long) * 8 - 16, SHIFT_SRA);
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/* sll data_reg, 16/48, arg1 */
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tcg_out_arithi(s, data_reg, arg1, sizeof(tcg_target_long) * 8 - 16, SHIFT_SLL);
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/* sra arg1, 16/48, arg1 */
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tcg_out_arithi(s, arg1, arg1, sizeof(tcg_target_long) * 8 - 16,
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SHIFT_SRA);
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break;
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case 2 | 4:
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/* sll i0, 32, i0 */
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tcg_out_arithi(s, TCG_REG_I0, TCG_REG_I0, 32, SHIFT_SLL);
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/* sra i0, 32, data_reg */
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tcg_out_arithi(s, data_reg, TCG_REG_I0, 32, SHIFT_SRA);
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/* sll data_reg, 32, arg1 */
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tcg_out_arithi(s, data_reg, arg1, 32, SHIFT_SLL);
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/* sra arg1, 32, arg1 */
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tcg_out_arithi(s, arg1, arg1, 32, SHIFT_SRA);
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break;
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case 0:
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case 1:
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@ -736,31 +780,40 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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case 3:
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default:
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/* mov */
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tcg_out_mov(s, data_reg, TCG_REG_I0);
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tcg_out_mov(s, arg1, data_reg);
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break;
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}
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/* mov */
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tcg_out_mov(s, arg0, addr_reg);
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/* XXX: move that code at the end of the TB */
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/* qemu_st_helper[s_bits](arg0, arg1, arg2) */
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tcg_out32(s, CALL | ((((tcg_target_ulong)qemu_st_helpers[s_bits]
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- (tcg_target_ulong)s->code_ptr) >> 2)
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& 0x3fffffff));
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/* mov (delay slot)*/
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tcg_out_movi(s, TCG_TYPE_I32, r1, mem_index);
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/* mov (delay slot) */
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tcg_out_movi(s, TCG_TYPE_I32, arg2, mem_index);
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/* will become:
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ba label2 */
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label2_ptr = s->code_ptr;
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label2_ptr = (uint32_t *)s->code_ptr;
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tcg_out32(s, 0);
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/* nop (delay slot) */
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tcg_out_nop(s);
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||||
/* label1: */
|
||||
*label1_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) |
|
||||
INSN_OFF22((unsigned long)label1_ptr -
|
||||
(unsigned long)s->code_ptr));
|
||||
*label1_ptr = (INSN_OP(0) | INSN_COND(COND_E, 0) | INSN_OP2(0x2) |
|
||||
INSN_OFF22((unsigned long)s->code_ptr -
|
||||
(unsigned long)label1_ptr));
|
||||
|
||||
/* ld [r1 + x], r1 */
|
||||
tcg_out_ldst(s, r1, r1, offsetof(CPUTLBEntry, addend) -
|
||||
offsetof(CPUTLBEntry, addr_write), ld_op);
|
||||
/* add x(r1), r0 */
|
||||
tcg_out_arith(s, r0, r1, r0, ARITH_ADD);
|
||||
tcg_out_ldst(s, arg1, r1, offsetof(CPUTLBEntry, addend) -
|
||||
offsetof(CPUTLBEntry, addr_write), host_ld_op);
|
||||
|
||||
/* add r0, r1, r0 */
|
||||
tcg_out_arith(s, r0, arg1, r0, ARITH_ADD);
|
||||
#else
|
||||
r0 = addr_reg;
|
||||
#endif
|
||||
@ -804,8 +857,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
|
||||
#if defined(CONFIG_SOFTMMU)
|
||||
/* label2: */
|
||||
*label2_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) |
|
||||
INSN_OFF22((unsigned long)label2_ptr -
|
||||
(unsigned long)s->code_ptr));
|
||||
INSN_OFF22((unsigned long)s->code_ptr -
|
||||
(unsigned long)label2_ptr));
|
||||
#endif
|
||||
}
|
||||
|
||||
|
@ -75,11 +75,11 @@ enum {
|
||||
#define TCG_REG_CALL_STACK TCG_REG_I6
|
||||
#ifdef __arch64__
|
||||
// Reserve space for AREG0
|
||||
#define TCG_TARGET_STACK_MINFRAME (176 + 2 * sizeof(long))
|
||||
#define TCG_TARGET_STACK_MINFRAME (176 + 2 * (int)sizeof(long))
|
||||
#define TCG_TARGET_CALL_STACK_OFFSET (2047 + TCG_TARGET_STACK_MINFRAME)
|
||||
#define TCG_TARGET_STACK_ALIGN 16
|
||||
#else
|
||||
#define TCG_TARGET_STACK_MINFRAME (92 + 2 * sizeof(long))
|
||||
#define TCG_TARGET_STACK_MINFRAME (92 + 2 * (int)sizeof(long))
|
||||
#define TCG_TARGET_CALL_STACK_OFFSET TCG_TARGET_STACK_MINFRAME
|
||||
#define TCG_TARGET_STACK_ALIGN 8
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user