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target/arm: Convert SVC

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Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190904193059.26202-34-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2019-09-04 12:30:23 -07:00 committed by Peter Maydell
parent 360144f3b9
commit 542f5188a1
2 changed files with 17 additions and 6 deletions
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4
target/arm/a32.decode
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@ -528,3 +528,7 @@ LDM_a32 ---- 100 b:1 i:1 u:1 w:1 1 rn:4 list:16 &ldst_block
B .... 1010 ........................ @branch
BL .... 1011 ........................ @branch
# Supervisor call
SVC ---- 1111 imm:24 &i

19
target/arm/translate.c
View File

@ -10081,6 +10081,18 @@ static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a)
return true;
}
/*
* Supervisor call
*/
static bool trans_SVC(DisasContext *s, arg_SVC *a)
{
gen_set_pc_im(s, s->base.pc_next);
s->svc_imm = a->imm;
s->base.is_jmp = DISAS_SWI;
return true;
}
/*
* Legacy decoder.
*/
@ -10348,6 +10360,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
case 0x09:
case 0xa:
case 0xb:
case 0xf:
/* All done in decodetree. Reach here for illegal ops. */
goto illegal_op;
case 0xc:
@ -10363,12 +10376,6 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
goto illegal_op;
}
break;
case 0xf:
/* swi */
gen_set_pc_im(s, s->base.pc_next);
s->svc_imm = extract32(insn, 0, 24);
s->base.is_jmp = DISAS_SWI;
break;
default:
illegal_op:
unallocated_encoding(s);