hw/intc/arm_gic: Add Security Extensions property

Add a QOM property which allows the GIC Security Extensions to be
enabled. These are an optional part of the GICv1 and GICv2 architecture.
This commit just adds the property and some sanity checks that it
is only enabled on GIC revisions that support it.

Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1430502643-25909-3-git-send-email-peter.maydell@linaro.org
Message-id: 1429113742-8371-5-git-send-email-greg.bellows@linaro.org
[PMM: changed property name, added checks that it isn't set for
 older GIC revisions or if using the KVM VGIC; reworded commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Fabian Aggeler 2015-05-12 11:57:16 +01:00 committed by Peter Maydell
parent 44f5529647
commit 5543d1abb6
4 changed files with 20 additions and 1 deletions

View File

@ -298,7 +298,10 @@ static uint32_t gic_dist_readb(void *opaque, hwaddr offset)
if (offset == 0)
return s->enabled;
if (offset == 4)
return ((s->num_irq / 32) - 1) | ((NUM_CPU(s) - 1) << 5);
/* Interrupt Controller Type Register */
return ((s->num_irq / 32) - 1)
| ((NUM_CPU(s) - 1) << 5)
| (s->security_extn << 10);
if (offset < 0x08)
return 0;
if (offset >= 0x80) {

View File

@ -110,6 +110,13 @@ static void arm_gic_common_realize(DeviceState *dev, Error **errp)
num_irq);
return;
}
if (s->security_extn &&
(s->revision == REV_11MPCORE || s->revision == REV_NVIC)) {
error_setg(errp, "this GIC revision does not implement "
"the security extensions");
return;
}
}
static void arm_gic_common_reset(DeviceState *dev)
@ -149,6 +156,8 @@ static Property arm_gic_common_properties[] = {
* (Internally, 0xffffffff also indicates "not a GIC but an NVIC".)
*/
DEFINE_PROP_UINT32("revision", GICState, revision, 1),
/* True if the GIC should implement the security extensions */
DEFINE_PROP_BOOL("has-security-extensions", GICState, security_extn, 0),
DEFINE_PROP_END_OF_LIST(),
};

View File

@ -544,6 +544,12 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp)
return;
}
if (s->security_extn) {
error_setg(errp, "the in-kernel VGIC does not implement the "
"security extensions");
return;
}
i = s->num_irq - GIC_INTERNAL;
/* For the GIC, also expose incoming GPIO lines for PPIs for each CPU.
* GPIO array layout is thus:

View File

@ -105,6 +105,7 @@ typedef struct GICState {
MemoryRegion cpuiomem[GIC_NCPU + 1]; /* CPU interfaces */
uint32_t num_irq;
uint32_t revision;
bool security_extn;
int dev_fd; /* kvm device fd if backed by kvm vgic support */
} GICState;