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mips: Break TBs after mfc0_count 

Break the TB after reading the count register. This makes it
possible to take timer interrupts immediately after a read of
a possibly expired timer.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
Edgar E. Iglesias 2011-01-17 23:00:08 +01:00
parent e027e1f075
commit 5580722456
1 changed files with 6 additions and 2 deletions
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8
target-mips/translate.c
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@ -3410,8 +3410,10 @@ static void gen_mfc0 (CPUState *env, DisasContext *ctx, TCGv arg, int reg, int s
gen_helper_mfc0_count(arg);
if (use_icount) {
gen_io_end();
ctx->bstate = BS_STOP;
}
/* Break the TB to be able to take timer interrupts immediately
after reading count. */
ctx->bstate = BS_STOP;
rn = "Count";
break;
/* 6,7 are implementation dependent */
@ -4581,8 +4583,10 @@ static void gen_dmfc0 (CPUState *env, DisasContext *ctx, TCGv arg, int reg, int
gen_helper_mfc0_count(arg);
if (use_icount) {
gen_io_end();
ctx->bstate = BS_STOP;
}
/* Break the TB to be able to take timer interrupts immediately
after reading count. */
ctx->bstate = BS_STOP;
rn = "Count";
break;
/* 6,7 are implementation dependent */