target/i386: validate SSE prefixes directly in the decoding table
Many SSE and AVX instructions are only valid with specific prefixes (none, 66, F3, F2). Introduce a direct way to encode this in the decoding table to avoid using decode groups too much. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -110,6 +110,22 @@
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#define avx2_256 .vex_special = X86_VEX_AVX2_256,
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#define P_00 1
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#define P_66 (1 << PREFIX_DATA)
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#define P_F3 (1 << PREFIX_REPZ)
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#define P_F2 (1 << PREFIX_REPNZ)
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#define p_00 .valid_prefix = P_00,
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#define p_66 .valid_prefix = P_66,
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#define p_f3 .valid_prefix = P_F3,
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#define p_f2 .valid_prefix = P_F2,
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#define p_00_66 .valid_prefix = P_00 | P_66,
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#define p_00_f3 .valid_prefix = P_00 | P_F3,
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#define p_66_f2 .valid_prefix = P_66 | P_F2,
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#define p_00_66_f3 .valid_prefix = P_00 | P_66 | P_F3,
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#define p_66_f3_f2 .valid_prefix = P_66 | P_F3 | P_F2,
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#define p_00_66_f3_f2 .valid_prefix = P_00 | P_66 | P_F3 | P_F2,
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static uint8_t get_modrm(DisasContext *s, CPUX86State *env)
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{
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if (!s->has_modrm) {
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@ -480,6 +496,23 @@ static bool decode_op(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode,
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return true;
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}
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static bool validate_sse_prefix(DisasContext *s, X86OpEntry *e)
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{
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uint16_t sse_prefixes;
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if (!e->valid_prefix) {
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return true;
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}
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if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
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/* In SSE instructions, 0xF3 and 0xF2 cancel 0x66. */
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s->prefix &= ~PREFIX_DATA;
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}
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/* Now, either zero or one bit is set in sse_prefixes. */
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sse_prefixes = s->prefix & (PREFIX_REPZ | PREFIX_REPNZ | PREFIX_DATA);
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return e->valid_prefix & (1 << sse_prefixes);
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}
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static bool decode_insn(DisasContext *s, CPUX86State *env, X86DecodeFunc decode_func,
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X86DecodedInsn *decode)
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{
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@ -491,6 +524,10 @@ static bool decode_insn(DisasContext *s, CPUX86State *env, X86DecodeFunc decode_
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e->decode(s, env, e, &decode->b);
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}
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if (!validate_sse_prefix(s, e)) {
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return false;
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}
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/* First compute size of operands in order to initialize s->rip_offset. */
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if (e->op0 != X86_TYPE_None) {
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if (!decode_op_size(s, e, e->s0, &decode->op[0].ot)) {
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@ -212,6 +212,7 @@ struct X86OpEntry {
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X86CPUIDFeature cpuid:8;
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unsigned vex_class:8;
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X86VEXSpecial vex_special:8;
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uint16_t valid_prefix:16;
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bool is_decode:1;
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};
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