target/arm: Split out flags setting from vfp compares
Minimize the code within a macro by splitting out a helper function. Use deposit32 instead of manual bit manipulation. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190209033847.9014-9-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -12871,31 +12871,40 @@ float64 VFP_HELPER(sqrt, d)(float64 a, CPUARMState *env)
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return float64_sqrt(a, &env->vfp.fp_status);
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}
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static void softfloat_to_vfp_compare(CPUARMState *env, int cmp)
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{
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uint32_t flags;
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switch (cmp) {
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case float_relation_equal:
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flags = 0x6;
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break;
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case float_relation_less:
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flags = 0x8;
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break;
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case float_relation_greater:
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flags = 0x2;
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break;
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case float_relation_unordered:
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flags = 0x3;
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break;
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default:
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g_assert_not_reached();
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}
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env->vfp.xregs[ARM_VFP_FPSCR] =
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deposit32(env->vfp.xregs[ARM_VFP_FPSCR], 28, 4, flags);
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}
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/* XXX: check quiet/signaling case */
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#define DO_VFP_cmp(p, type) \
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void VFP_HELPER(cmp, p)(type a, type b, CPUARMState *env) \
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{ \
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uint32_t flags; \
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switch(type ## _compare_quiet(a, b, &env->vfp.fp_status)) { \
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case 0: flags = 0x6; break; \
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case -1: flags = 0x8; break; \
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case 1: flags = 0x2; break; \
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default: case 2: flags = 0x3; break; \
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} \
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env->vfp.xregs[ARM_VFP_FPSCR] = (flags << 28) \
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| (env->vfp.xregs[ARM_VFP_FPSCR] & 0x0fffffff); \
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softfloat_to_vfp_compare(env, \
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type ## _compare_quiet(a, b, &env->vfp.fp_status)); \
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} \
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void VFP_HELPER(cmpe, p)(type a, type b, CPUARMState *env) \
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{ \
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uint32_t flags; \
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switch(type ## _compare(a, b, &env->vfp.fp_status)) { \
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case 0: flags = 0x6; break; \
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case -1: flags = 0x8; break; \
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case 1: flags = 0x2; break; \
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default: case 2: flags = 0x3; break; \
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} \
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env->vfp.xregs[ARM_VFP_FPSCR] = (flags << 28) \
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| (env->vfp.xregs[ARM_VFP_FPSCR] & 0x0fffffff); \
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softfloat_to_vfp_compare(env, \
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type ## _compare(a, b, &env->vfp.fp_status)); \
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}
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DO_VFP_cmp(s, float32)
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DO_VFP_cmp(d, float64)
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