SD/MMC patches
- Various improvements for SD cards in SPI mode (Bin Meng) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmANx6cACgkQ4+MsLN6t wN5OTRAAvBZrBn3YktziZZds4HpKpBdEC/lAmlYNBCl6cn6gpAfrYz1WjpKm+DrA 0tfDeanoqUnWNReYwFRyQHzpWtIjIGo1K5tLbBVGE3qL1DtoZliDMA94RAGZu9UW vrdWFxFtRFJ6Yqs0JjIhY2c+K9y7UcYRqATihbl/TpQNLSlVKblKnP1GPKZWqpRx RL+sdAzwXhtXLzaJ/Jnk4XDTibNsLsRMWsa0rKM2o6181NqumYDj6gWOFfZWADji lScwZzU0gWxYEarruUWaMMDxxB/1OXGH5Rd+bpDTrqVJV9qgsEEVj1VrJVfCPQFk nInd0X4cAp+Mq4x901eovWcF+nT/zNWS/vJ0JiJKlxciz3Oev0kJLPJ/3YssLK3k LYrhb20Py5ug41XYnpOKLcXR8CBKyqRlmwp8U330lCooLDxhy2hXaU41B0Dte3M3 CgngnOKmr2xizdWKy8L9GFvcQIPv1w9tRIOm/Z3CaU4JNaDSZo8vSUMFAtzsiW7B dB6TOXcYxQZEPt1u6dO5KUDetd7m2pRMQ+or5lZa3d5w57kpAzuLRyiyXWv1npQc 4nVf6fS/tqmkqOjZkyj3lliAKdDkmEfWoiSRvUjHeddetGFd5VJ8IjPdf6pDGj1G H1ix3N1JIrGpBmKwVrjTbxeGBGuD4vhetQeMQ498exmzaiYEmgk= =B3sY -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/philmd-gitlab/tags/sdmmc-20210124' into staging SD/MMC patches - Various improvements for SD cards in SPI mode (Bin Meng) # gpg: Signature made Sun 24 Jan 2021 19:16:55 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/sdmmc-20210124: hw/sd: sd.h: Cosmetic change of using spaces hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer hw/sd: ssi-sd: Fix the wrong command index for STOP_TRANSMISSION hw/sd: ssi-sd: Add a state representing Nac hw/sd: ssi-sd: Suffix a data block with CRC16 util: Add CRC16 (CCITT) calculation routines hw/sd: sd: Drop sd_crc16() hw/sd: sd: Support CMD59 for SPI mode hw/sd: ssi-sd: Fix incorrect card response sequence Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
55d98950a6
26
hw/sd/sd.c
26
hw/sd/sd.c
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@ -271,23 +271,6 @@ static uint8_t sd_crc7(const void *message, size_t width)
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return shift_reg;
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}
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static uint16_t sd_crc16(const void *message, size_t width)
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{
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int i, bit;
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uint16_t shift_reg = 0x0000;
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const uint16_t *msg = (const uint16_t *)message;
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width <<= 1;
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for (i = 0; i < width; i ++, msg ++)
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for (bit = 15; bit >= 0; bit --) {
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shift_reg <<= 1;
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if ((shift_reg >> 15) ^ ((*msg >> bit) & 1))
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shift_reg ^= 0x1011;
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}
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return shift_reg;
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}
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#define OCR_POWER_DELAY_NS 500000 /* 0.5ms */
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FIELD(OCR, VDD_VOLTAGE_WINDOW, 0, 24)
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@ -843,7 +826,6 @@ static void sd_function_switch(SDState *sd, uint32_t arg)
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sd->data[16 - (i >> 1)] |= new_func << ((i % 2) * 4);
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}
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memset(&sd->data[17], 0, 47);
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stw_be_p(sd->data + 64, sd_crc16(sd->data, 64));
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}
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static inline bool sd_wp_addr(SDState *sd, uint64_t addr)
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@ -1517,18 +1499,12 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
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if (!sd->spi) {
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goto bad_cmd;
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}
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goto unimplemented_spi_cmd;
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return sd_r1;
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default:
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bad_cmd:
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qemu_log_mask(LOG_GUEST_ERROR, "SD: Unknown CMD%i\n", req.cmd);
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return sd_illegal;
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unimplemented_spi_cmd:
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/* Commands that are recognised but not yet implemented in SPI mode. */
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qemu_log_mask(LOG_UNIMP, "SD: CMD%i not implemented in SPI mode\n",
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req.cmd);
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return sd_illegal;
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}
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qemu_log_mask(LOG_GUEST_ERROR, "SD: CMD%i in a wrong state\n", req.cmd);
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@ -17,6 +17,7 @@
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#include "hw/qdev-properties.h"
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#include "hw/sd/sd.h"
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#include "qapi/error.h"
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#include "qemu/crc-ccitt.h"
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#include "qemu/module.h"
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#include "qom/object.h"
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@ -36,9 +37,12 @@ do { fprintf(stderr, "ssi_sd: error: " fmt , ## __VA_ARGS__);} while (0)
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typedef enum {
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SSI_SD_CMD = 0,
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SSI_SD_CMDARG,
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SSI_SD_PREP_RESP,
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SSI_SD_RESPONSE,
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SSI_SD_PREP_DATA,
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SSI_SD_DATA_START,
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SSI_SD_DATA_READ,
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SSI_SD_DATA_CRC16,
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} ssi_sd_mode;
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struct ssi_sd_state {
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@ -47,6 +51,7 @@ struct ssi_sd_state {
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int cmd;
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uint8_t cmdarg[4];
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uint8_t response[5];
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uint16_t crc16;
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int32_t arglen;
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int32_t response_pos;
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int32_t stopping;
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@ -73,12 +78,18 @@ OBJECT_DECLARE_SIMPLE_TYPE(ssi_sd_state, SSI_SD)
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#define SSI_SDR_ADDRESS_ERROR 0x2000
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#define SSI_SDR_PARAMETER_ERROR 0x4000
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/* single block read/write, multiple block read */
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#define SSI_TOKEN_SINGLE 0xfe
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/* dummy value - don't care */
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#define SSI_DUMMY 0xff
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static uint32_t ssi_sd_transfer(SSIPeripheral *dev, uint32_t val)
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{
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ssi_sd_state *s = SSI_SD(dev);
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/* Special case: allow CMD12 (STOP TRANSMISSION) while reading data. */
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if (s->mode == SSI_SD_DATA_READ && val == 0x4d) {
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if (s->mode == SSI_SD_DATA_READ && val == 0x4c) {
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s->mode = SSI_SD_CMD;
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/* There must be at least one byte delay before the card responds. */
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s->stopping = 1;
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@ -86,14 +97,14 @@ static uint32_t ssi_sd_transfer(SSIPeripheral *dev, uint32_t val)
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switch (s->mode) {
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case SSI_SD_CMD:
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if (val == 0xff) {
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if (val == SSI_DUMMY) {
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DPRINTF("NULL command\n");
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return 0xff;
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return SSI_DUMMY;
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}
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s->cmd = val & 0x3f;
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s->mode = SSI_SD_CMDARG;
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s->arglen = 0;
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return 0xff;
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return SSI_DUMMY;
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case SSI_SD_CMDARG:
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if (s->arglen == 4) {
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SDRequest request;
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@ -163,16 +174,20 @@ static uint32_t ssi_sd_transfer(SSIPeripheral *dev, uint32_t val)
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s->response[1] = status;
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DPRINTF("Card status 0x%02x\n", status);
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}
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s->mode = SSI_SD_RESPONSE;
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s->mode = SSI_SD_PREP_RESP;
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s->response_pos = 0;
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} else {
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s->cmdarg[s->arglen++] = val;
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}
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return 0xff;
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return SSI_DUMMY;
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case SSI_SD_PREP_RESP:
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DPRINTF("Prepare card response (Ncr)\n");
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s->mode = SSI_SD_RESPONSE;
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return SSI_DUMMY;
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case SSI_SD_RESPONSE:
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if (s->stopping) {
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s->stopping = 0;
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return 0xff;
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return SSI_DUMMY;
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}
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if (s->response_pos < s->arglen) {
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DPRINTF("Response 0x%02x\n", s->response[s->response_pos]);
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@ -185,28 +200,44 @@ static uint32_t ssi_sd_transfer(SSIPeripheral *dev, uint32_t val)
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DPRINTF("End of command\n");
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s->mode = SSI_SD_CMD;
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}
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return 0xff;
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return SSI_DUMMY;
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case SSI_SD_PREP_DATA:
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DPRINTF("Prepare data block (Nac)\n");
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s->mode = SSI_SD_DATA_START;
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return SSI_DUMMY;
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case SSI_SD_DATA_START:
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DPRINTF("Start read block\n");
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s->mode = SSI_SD_DATA_READ;
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return 0xfe;
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s->response_pos = 0;
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return SSI_TOKEN_SINGLE;
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case SSI_SD_DATA_READ:
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val = sdbus_read_byte(&s->sdbus);
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s->crc16 = crc_ccitt_false(s->crc16, (uint8_t *)&val, 1);
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if (!sdbus_data_ready(&s->sdbus)) {
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DPRINTF("Data read end\n");
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s->mode = SSI_SD_DATA_CRC16;
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}
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return val;
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case SSI_SD_DATA_CRC16:
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val = (s->crc16 & 0xff00) >> 8;
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s->crc16 <<= 8;
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s->response_pos++;
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if (s->response_pos == 2) {
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DPRINTF("CRC16 read end\n");
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s->mode = SSI_SD_CMD;
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s->response_pos = 0;
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}
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return val;
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}
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/* Should never happen. */
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return 0xff;
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return SSI_DUMMY;
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}
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static int ssi_sd_post_load(void *opaque, int version_id)
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{
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ssi_sd_state *s = (ssi_sd_state *)opaque;
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if (s->mode > SSI_SD_DATA_READ) {
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if (s->mode > SSI_SD_DATA_CRC16) {
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return -EINVAL;
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}
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if (s->mode == SSI_SD_CMDARG &&
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@ -224,14 +255,15 @@ static int ssi_sd_post_load(void *opaque, int version_id)
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static const VMStateDescription vmstate_ssi_sd = {
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.name = "ssi_sd",
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.version_id = 2,
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.minimum_version_id = 2,
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.version_id = 5,
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.minimum_version_id = 5,
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.post_load = ssi_sd_post_load,
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.fields = (VMStateField []) {
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VMSTATE_UINT32(mode, ssi_sd_state),
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VMSTATE_INT32(cmd, ssi_sd_state),
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VMSTATE_UINT8_ARRAY(cmdarg, ssi_sd_state, 4),
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VMSTATE_UINT8_ARRAY(response, ssi_sd_state, 5),
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VMSTATE_UINT16(crc16, ssi_sd_state),
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VMSTATE_INT32(arglen, ssi_sd_state),
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VMSTATE_INT32(response_pos, ssi_sd_state),
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VMSTATE_INT32(stopping, ssi_sd_state),
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@ -283,6 +315,7 @@ static void ssi_sd_reset(DeviceState *dev)
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s->cmd = 0;
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memset(s->cmdarg, 0, sizeof(s->cmdarg));
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memset(s->response, 0, sizeof(s->response));
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s->crc16 = 0;
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s->arglen = 0;
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s->response_pos = 0;
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s->stopping = 0;
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@ -33,27 +33,27 @@
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#include "hw/qdev-core.h"
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#include "qom/object.h"
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#define OUT_OF_RANGE (1 << 31)
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#define ADDRESS_ERROR (1 << 30)
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#define BLOCK_LEN_ERROR (1 << 29)
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#define ERASE_SEQ_ERROR (1 << 28)
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#define ERASE_PARAM (1 << 27)
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#define WP_VIOLATION (1 << 26)
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#define CARD_IS_LOCKED (1 << 25)
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#define LOCK_UNLOCK_FAILED (1 << 24)
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#define COM_CRC_ERROR (1 << 23)
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#define ILLEGAL_COMMAND (1 << 22)
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#define CARD_ECC_FAILED (1 << 21)
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#define CC_ERROR (1 << 20)
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#define SD_ERROR (1 << 19)
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#define CID_CSD_OVERWRITE (1 << 16)
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#define WP_ERASE_SKIP (1 << 15)
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#define CARD_ECC_DISABLED (1 << 14)
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#define ERASE_RESET (1 << 13)
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#define CURRENT_STATE (7 << 9)
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#define READY_FOR_DATA (1 << 8)
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#define APP_CMD (1 << 5)
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#define AKE_SEQ_ERROR (1 << 3)
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#define OUT_OF_RANGE (1 << 31)
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#define ADDRESS_ERROR (1 << 30)
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#define BLOCK_LEN_ERROR (1 << 29)
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#define ERASE_SEQ_ERROR (1 << 28)
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#define ERASE_PARAM (1 << 27)
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#define WP_VIOLATION (1 << 26)
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#define CARD_IS_LOCKED (1 << 25)
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#define LOCK_UNLOCK_FAILED (1 << 24)
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#define COM_CRC_ERROR (1 << 23)
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#define ILLEGAL_COMMAND (1 << 22)
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#define CARD_ECC_FAILED (1 << 21)
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#define CC_ERROR (1 << 20)
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#define SD_ERROR (1 << 19)
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#define CID_CSD_OVERWRITE (1 << 16)
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#define WP_ERASE_SKIP (1 << 15)
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#define CARD_ECC_DISABLED (1 << 14)
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#define ERASE_RESET (1 << 13)
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#define CURRENT_STATE (7 << 9)
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#define READY_FOR_DATA (1 << 8)
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#define APP_CMD (1 << 5)
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#define AKE_SEQ_ERROR (1 << 3)
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enum SDPhySpecificationVersion {
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SD_PHY_SPECv1_10_VERS = 1,
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@ -0,0 +1,33 @@
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/*
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* CRC16 (CCITT) Checksum Algorithm
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*
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* Copyright (c) 2021 Wind River Systems, Inc.
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*
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* Author:
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* Bin Meng <bin.meng@windriver.com>
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*
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* From Linux kernel v5.10 include/linux/crc-ccitt.h
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _CRC_CCITT_H
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#define _CRC_CCITT_H
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extern uint16_t const crc_ccitt_table[256];
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extern uint16_t const crc_ccitt_false_table[256];
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extern uint16_t crc_ccitt(uint16_t crc, const uint8_t *buffer, size_t len);
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extern uint16_t crc_ccitt_false(uint16_t crc, const uint8_t *buffer, size_t len);
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static inline uint16_t crc_ccitt_byte(uint16_t crc, const uint8_t c)
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{
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return (crc >> 8) ^ crc_ccitt_table[(crc ^ c) & 0xff];
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}
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static inline uint16_t crc_ccitt_false_byte(uint16_t crc, const uint8_t c)
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{
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return (crc << 8) ^ crc_ccitt_false_table[(crc >> 8) ^ c];
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}
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#endif /* _CRC_CCITT_H */
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@ -0,0 +1,127 @@
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/*
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* CRC16 (CCITT) Checksum Algorithm
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*
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* Copyright (c) 2021 Wind River Systems, Inc.
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*
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* Author:
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* Bin Meng <bin.meng@windriver.com>
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*
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* From Linux kernel v5.10 lib/crc-ccitt.c
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*
|
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* SPDX-License-Identifier: GPL-2.0-only
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*/
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|
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#include "qemu/osdep.h"
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#include "qemu/crc-ccitt.h"
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|
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/*
|
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* This mysterious table is just the CRC of each possible byte. It can be
|
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* computed using the standard bit-at-a-time methods. The polynomial can
|
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* be seen in entry 128, 0x8408. This corresponds to x^0 + x^5 + x^12.
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* Add the implicit x^16, and you have the standard CRC-CCITT.
|
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*/
|
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uint16_t const crc_ccitt_table[256] = {
|
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0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
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0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
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0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
|
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0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
|
||||
0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
|
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0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
|
||||
0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
|
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0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
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0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
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||||
0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
|
||||
0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
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0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
|
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0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
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0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
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0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
|
||||
0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
|
||||
0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
|
||||
0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
|
||||
0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
|
||||
0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
|
||||
0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
|
||||
0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
|
||||
0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
|
||||
0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
|
||||
0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
|
||||
0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
|
||||
0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
|
||||
0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
|
||||
0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
|
||||
0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
|
||||
0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
|
||||
0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
|
||||
};
|
||||
|
||||
/*
|
||||
* Similar table to calculate CRC16 variant known as CRC-CCITT-FALSE
|
||||
* Reflected bits order, does not augment final value.
|
||||
*/
|
||||
uint16_t const crc_ccitt_false_table[256] = {
|
||||
0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
|
||||
0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
|
||||
0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
|
||||
0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
|
||||
0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
|
||||
0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
|
||||
0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
|
||||
0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
|
||||
0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
|
||||
0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
|
||||
0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
|
||||
0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
|
||||
0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
|
||||
0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
|
||||
0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
|
||||
0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
|
||||
0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
|
||||
0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
|
||||
0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
|
||||
0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
|
||||
0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
|
||||
0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
|
||||
0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
|
||||
0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
|
||||
0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
|
||||
0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
|
||||
0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
|
||||
0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
|
||||
0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
|
||||
0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
|
||||
0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
|
||||
0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
|
||||
};
|
||||
|
||||
/**
|
||||
* crc_ccitt - recompute the CRC (CRC-CCITT variant)
|
||||
* for the data buffer
|
||||
*
|
||||
* @crc: previous CRC value
|
||||
* @buffer: data pointer
|
||||
* @len: number of bytes in the buffer
|
||||
*/
|
||||
uint16_t crc_ccitt(uint16_t crc, uint8_t const *buffer, size_t len)
|
||||
{
|
||||
while (len--) {
|
||||
crc = crc_ccitt_byte(crc, *buffer++);
|
||||
}
|
||||
return crc;
|
||||
}
|
||||
|
||||
/**
|
||||
* crc_ccitt_false - recompute the CRC (CRC-CCITT-FALSE variant)
|
||||
* for the data buffer
|
||||
*
|
||||
* @crc: previous CRC value
|
||||
* @buffer: data pointer
|
||||
* @len: number of bytes in the buffer
|
||||
*/
|
||||
uint16_t crc_ccitt_false(uint16_t crc, uint8_t const *buffer, size_t len)
|
||||
{
|
||||
while (len--) {
|
||||
crc = crc_ccitt_false_byte(crc, *buffer++);
|
||||
}
|
||||
return crc;
|
||||
}
|
||||
|
|
@ -49,6 +49,7 @@ if have_user
|
|||
endif
|
||||
|
||||
if have_system
|
||||
util_ss.add(files('crc-ccitt.c'))
|
||||
util_ss.add(when: 'CONFIG_GIO', if_true: [files('dbus.c'), gio])
|
||||
util_ss.add(files('yank.c'))
|
||||
endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue