hw/riscv: shakti_c: Use MachineState::ram and MachineClass::default_ram_id
Using memory_region_init_ram(), which can't possibly handle vhost-user, and can't work as expected with '-numa node,memdev' options. Use MachineState::ram instead of manually initializing RAM memory region, as well as by providing MachineClass::default_ram_id to opt in to memdev scheme. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20211020014112.7336-4-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -45,7 +45,6 @@ static void shakti_c_machine_state_init(MachineState *mstate)
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{
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{
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ShaktiCMachineState *sms = RISCV_SHAKTI_MACHINE(mstate);
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ShaktiCMachineState *sms = RISCV_SHAKTI_MACHINE(mstate);
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MemoryRegion *system_memory = get_system_memory();
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MemoryRegion *system_memory = get_system_memory();
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MemoryRegion *main_mem = g_new(MemoryRegion, 1);
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/* Allow only Shakti C CPU for this platform */
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/* Allow only Shakti C CPU for this platform */
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if (strcmp(mstate->cpu_type, TYPE_RISCV_CPU_SHAKTI_C) != 0) {
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if (strcmp(mstate->cpu_type, TYPE_RISCV_CPU_SHAKTI_C) != 0) {
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@ -59,11 +58,9 @@ static void shakti_c_machine_state_init(MachineState *mstate)
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qdev_realize(DEVICE(&sms->soc), NULL, &error_abort);
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qdev_realize(DEVICE(&sms->soc), NULL, &error_abort);
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/* register RAM */
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/* register RAM */
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memory_region_init_ram(main_mem, NULL, "riscv.shakti.c.ram",
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mstate->ram_size, &error_fatal);
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memory_region_add_subregion(system_memory,
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memory_region_add_subregion(system_memory,
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shakti_c_memmap[SHAKTI_C_RAM].base,
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shakti_c_memmap[SHAKTI_C_RAM].base,
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main_mem);
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mstate->ram);
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/* ROM reset vector */
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/* ROM reset vector */
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riscv_setup_rom_reset_vec(mstate, &sms->soc.cpus,
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riscv_setup_rom_reset_vec(mstate, &sms->soc.cpus,
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@ -88,6 +85,7 @@ static void shakti_c_machine_class_init(ObjectClass *klass, void *data)
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mc->desc = "RISC-V Board compatible with Shakti SDK";
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mc->desc = "RISC-V Board compatible with Shakti SDK";
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mc->init = shakti_c_machine_state_init;
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mc->init = shakti_c_machine_state_init;
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mc->default_cpu_type = TYPE_RISCV_CPU_SHAKTI_C;
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mc->default_cpu_type = TYPE_RISCV_CPU_SHAKTI_C;
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mc->default_ram_id = "riscv.shakti.c.ram";
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}
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}
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static const TypeInfo shakti_c_machine_type_info = {
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static const TypeInfo shakti_c_machine_type_info = {
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