Add GDB XML register description support.
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5459 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
pbrook
parent
1792f2867c
commit
56aebc8916
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@ -418,7 +418,7 @@ OBJS+= m68k-sim.o m68k-semi.o
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endif
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ifdef CONFIG_GDBSTUB
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OBJS+=gdbstub.o
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OBJS+=gdbstub.o gdbstub-xml.o
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endif
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OBJS+= libqemu.a
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@ -456,7 +456,7 @@ OBJS= main.o commpage.o machload.o mmap.o signal.o syscall.o thunk.o
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OBJS+= libqemu.a
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ifdef CONFIG_GDBSTUB
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OBJS+=gdbstub.o
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OBJS+=gdbstub.o gdbstub-xml.o
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endif
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# Note: this is a workaround. The real fix is to avoid compiling
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@ -626,7 +626,7 @@ OBJS+= an5206.o mcf5206.o ptimer.o mcf_uart.o mcf_intc.o mcf5208.o mcf_fec.o
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OBJS+= m68k-semi.o dummy_m68k.o
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endif
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ifdef CONFIG_GDBSTUB
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OBJS+=gdbstub.o
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OBJS+=gdbstub.o gdbstub-xml.o
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endif
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ifdef CONFIG_COCOA
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COCOA_LIBS=-F/System/Library/Frameworks -framework Cocoa -framework IOKit
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@ -674,6 +674,14 @@ $(QEMU_PROG): $(OBJS) ../libqemu_common.a libqemu.a
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endif # !CONFIG_USER_ONLY
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gdbstub-xml.c: $(TARGET_XML_FILES) feature_to_c.sh
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rm -f $@
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ifeq ($(TARGET_XML_FILES),)
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echo > $@
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else
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$(SHELL) $(SRC_PATH)/feature_to_c.sh $@ $(TARGET_XML_FILES)
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endif
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%.o: %.c
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$(CC) $(CPPFLAGS) $(CFLAGS) -c -o $@ $<
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@ -1386,6 +1386,7 @@ elfload32="no"
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target_nptl="no"
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interp_prefix1=`echo "$interp_prefix" | sed "s/%M/$target_cpu/g"`
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echo "#define CONFIG_QEMU_PREFIX \"$interp_prefix1\"" >> $config_h
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gdb_xml_files=""
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case "$target_cpu" in
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i386)
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@ -1425,6 +1426,7 @@ case "$target_cpu" in
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echo "#define TARGET_ARM 1" >> $config_h
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bflt="yes"
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target_nptl="yes"
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gdb_xml_files="arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml"
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;;
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cris)
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echo "TARGET_ARCH=cris" >> $config_mak
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@ -1436,6 +1438,7 @@ case "$target_cpu" in
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echo "#define TARGET_ARCH \"m68k\"" >> $config_h
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echo "#define TARGET_M68K 1" >> $config_h
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bflt="yes"
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gdb_xml_files="cf-core.xml cf-fp.xml"
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;;
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mips|mipsel)
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echo "TARGET_ARCH=mips" >> $config_mak
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@ -1545,6 +1548,13 @@ if test "$target_darwin_user" = "yes" ; then
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echo "CONFIG_DARWIN_USER=yes" >> $config_mak
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echo "#define CONFIG_DARWIN_USER 1" >> $config_h
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fi
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list=""
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if test ! -z "$gdb_xml_files" ; then
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for x in $gdb_xml_files; do
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list="$list $source_path/gdb-xml/$x"
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done
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fi
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echo "TARGET_XML_FILES=$list" >> $config_mak
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if test "$target_cpu" = "arm" \
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-o "$target_cpu" = "armeb" \
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@ -185,6 +185,8 @@ typedef struct icount_decr_u16 {
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int nb_watchpoints; \
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int watchpoint_hit; \
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\
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struct GDBRegisterState *gdb_regs; \
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\
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/* Core interrupt code */ \
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jmp_buf jmp_env; \
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int exception_index; \
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@ -0,0 +1,31 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2008 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.arm.core">
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<reg name="r0" bitsize="32"/>
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<reg name="r1" bitsize="32"/>
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<reg name="r2" bitsize="32"/>
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<reg name="r3" bitsize="32"/>
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<reg name="r4" bitsize="32"/>
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<reg name="r5" bitsize="32"/>
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<reg name="r6" bitsize="32"/>
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<reg name="r7" bitsize="32"/>
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<reg name="r8" bitsize="32"/>
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<reg name="r9" bitsize="32"/>
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<reg name="r10" bitsize="32"/>
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<reg name="r11" bitsize="32"/>
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<reg name="r12" bitsize="32"/>
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<reg name="sp" bitsize="32" type="data_ptr"/>
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<reg name="lr" bitsize="32"/>
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<reg name="pc" bitsize="32" type="code_ptr"/>
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<!-- The CPSR is register 25, rather than register 16, because
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the FPA registers historically were placed between the PC
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and the CPSR in the "g" packet. -->
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<reg name="cpsr" bitsize="32" regnum="25"/>
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</feature>
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@ -0,0 +1,88 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2008 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.arm.neon">
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<vector id="neon_uint8x8" type="uint8" count="8"/>
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<vector id="neon_uint16x4" type="uint16" count="4"/>
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<vector id="neon_uint32x2" type="uint32" count="2"/>
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<vector id="neon_float32x2" type="ieee_single" count="2"/>
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<union id="neon_d">
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<field name="u8" type="neon_uint8x8"/>
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<field name="u16" type="neon_uint16x4"/>
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<field name="u32" type="neon_uint32x2"/>
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<field name="u64" type="uint64"/>
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<field name="f32" type="neon_float32x2"/>
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<field name="f64" type="ieee_double"/>
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</union>
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<vector id="neon_uint8x16" type="uint8" count="16"/>
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<vector id="neon_uint16x8" type="uint16" count="8"/>
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<vector id="neon_uint32x4" type="uint32" count="4"/>
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<vector id="neon_uint64x2" type="uint64" count="2"/>
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<vector id="neon_float32x4" type="ieee_single" count="4"/>
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<vector id="neon_float64x2" type="ieee_double" count="2"/>
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<union id="neon_q">
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<field name="u8" type="neon_uint8x16"/>
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<field name="u16" type="neon_uint16x8"/>
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<field name="u32" type="neon_uint32x4"/>
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<field name="u64" type="neon_uint64x2"/>
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<field name="f32" type="neon_float32x4"/>
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<field name="f64" type="neon_float64x2"/>
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</union>
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<reg name="d0" bitsize="64" type="neon_d"/>
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<reg name="d1" bitsize="64" type="neon_d"/>
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<reg name="d2" bitsize="64" type="neon_d"/>
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<reg name="d3" bitsize="64" type="neon_d"/>
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<reg name="d4" bitsize="64" type="neon_d"/>
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<reg name="d5" bitsize="64" type="neon_d"/>
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<reg name="d6" bitsize="64" type="neon_d"/>
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<reg name="d7" bitsize="64" type="neon_d"/>
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<reg name="d8" bitsize="64" type="neon_d"/>
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<reg name="d9" bitsize="64" type="neon_d"/>
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<reg name="d10" bitsize="64" type="neon_d"/>
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<reg name="d11" bitsize="64" type="neon_d"/>
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<reg name="d12" bitsize="64" type="neon_d"/>
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<reg name="d13" bitsize="64" type="neon_d"/>
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<reg name="d14" bitsize="64" type="neon_d"/>
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<reg name="d15" bitsize="64" type="neon_d"/>
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<reg name="d16" bitsize="64" type="neon_d"/>
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<reg name="d17" bitsize="64" type="neon_d"/>
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<reg name="d18" bitsize="64" type="neon_d"/>
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<reg name="d19" bitsize="64" type="neon_d"/>
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<reg name="d20" bitsize="64" type="neon_d"/>
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<reg name="d21" bitsize="64" type="neon_d"/>
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<reg name="d22" bitsize="64" type="neon_d"/>
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<reg name="d23" bitsize="64" type="neon_d"/>
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<reg name="d24" bitsize="64" type="neon_d"/>
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<reg name="d25" bitsize="64" type="neon_d"/>
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<reg name="d26" bitsize="64" type="neon_d"/>
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<reg name="d27" bitsize="64" type="neon_d"/>
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<reg name="d28" bitsize="64" type="neon_d"/>
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<reg name="d29" bitsize="64" type="neon_d"/>
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<reg name="d30" bitsize="64" type="neon_d"/>
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<reg name="d31" bitsize="64" type="neon_d"/>
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<reg name="q0" bitsize="128" type="neon_q"/>
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<reg name="q1" bitsize="128" type="neon_q"/>
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<reg name="q2" bitsize="128" type="neon_q"/>
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<reg name="q3" bitsize="128" type="neon_q"/>
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<reg name="q4" bitsize="128" type="neon_q"/>
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<reg name="q5" bitsize="128" type="neon_q"/>
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<reg name="q6" bitsize="128" type="neon_q"/>
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<reg name="q7" bitsize="128" type="neon_q"/>
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<reg name="q8" bitsize="128" type="neon_q"/>
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<reg name="q9" bitsize="128" type="neon_q"/>
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<reg name="q10" bitsize="128" type="neon_q"/>
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<reg name="q10" bitsize="128" type="neon_q"/>
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<reg name="q12" bitsize="128" type="neon_q"/>
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<reg name="q13" bitsize="128" type="neon_q"/>
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<reg name="q14" bitsize="128" type="neon_q"/>
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<reg name="q15" bitsize="128" type="neon_q"/>
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<reg name="fpsid" bitsize="32" type="int" group="float"/>
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<reg name="fpscr" bitsize="32" type="int" group="float"/>
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<reg name="fpexc" bitsize="32" type="int" group="float"/>
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</feature>
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@ -0,0 +1,29 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2008 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.arm.vfp">
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<reg name="d0" bitsize="64" type="float"/>
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<reg name="d1" bitsize="64" type="float"/>
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<reg name="d2" bitsize="64" type="float"/>
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<reg name="d3" bitsize="64" type="float"/>
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<reg name="d4" bitsize="64" type="float"/>
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<reg name="d5" bitsize="64" type="float"/>
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<reg name="d6" bitsize="64" type="float"/>
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<reg name="d7" bitsize="64" type="float"/>
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<reg name="d8" bitsize="64" type="float"/>
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<reg name="d9" bitsize="64" type="float"/>
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<reg name="d10" bitsize="64" type="float"/>
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<reg name="d11" bitsize="64" type="float"/>
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<reg name="d12" bitsize="64" type="float"/>
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<reg name="d13" bitsize="64" type="float"/>
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<reg name="d14" bitsize="64" type="float"/>
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<reg name="d15" bitsize="64" type="float"/>
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<reg name="fpsid" bitsize="32" type="int" group="float"/>
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<reg name="fpscr" bitsize="32" type="int" group="float"/>
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<reg name="fpexc" bitsize="32" type="int" group="float"/>
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</feature>
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@ -0,0 +1,45 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2008 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.arm.vfpv3">
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<reg name="d0" bitsize="64" type="float"/>
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<reg name="d1" bitsize="64" type="float"/>
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<reg name="d2" bitsize="64" type="float"/>
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<reg name="d3" bitsize="64" type="float"/>
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<reg name="d4" bitsize="64" type="float"/>
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<reg name="d5" bitsize="64" type="float"/>
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<reg name="d6" bitsize="64" type="float"/>
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<reg name="d7" bitsize="64" type="float"/>
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<reg name="d8" bitsize="64" type="float"/>
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<reg name="d9" bitsize="64" type="float"/>
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<reg name="d10" bitsize="64" type="float"/>
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<reg name="d11" bitsize="64" type="float"/>
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<reg name="d12" bitsize="64" type="float"/>
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<reg name="d13" bitsize="64" type="float"/>
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<reg name="d14" bitsize="64" type="float"/>
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<reg name="d15" bitsize="64" type="float"/>
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<reg name="d16" bitsize="64" type="float"/>
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<reg name="d17" bitsize="64" type="float"/>
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<reg name="d18" bitsize="64" type="float"/>
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<reg name="d19" bitsize="64" type="float"/>
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<reg name="d20" bitsize="64" type="float"/>
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<reg name="d21" bitsize="64" type="float"/>
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<reg name="d22" bitsize="64" type="float"/>
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<reg name="d23" bitsize="64" type="float"/>
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<reg name="d24" bitsize="64" type="float"/>
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<reg name="d25" bitsize="64" type="float"/>
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<reg name="d26" bitsize="64" type="float"/>
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<reg name="d27" bitsize="64" type="float"/>
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<reg name="d28" bitsize="64" type="float"/>
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<reg name="d29" bitsize="64" type="float"/>
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<reg name="d30" bitsize="64" type="float"/>
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<reg name="d31" bitsize="64" type="float"/>
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<reg name="fpsid" bitsize="32" type="int" group="float"/>
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<reg name="fpscr" bitsize="32" type="int" group="float"/>
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<reg name="fpexc" bitsize="32" type="int" group="float"/>
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</feature>
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@ -0,0 +1,29 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2008 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.coldfire.core">
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<reg name="d0" bitsize="32"/>
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<reg name="d1" bitsize="32"/>
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<reg name="d2" bitsize="32"/>
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<reg name="d3" bitsize="32"/>
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<reg name="d4" bitsize="32"/>
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<reg name="d5" bitsize="32"/>
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<reg name="d6" bitsize="32"/>
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<reg name="d7" bitsize="32"/>
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<reg name="a0" bitsize="32" type="data_ptr"/>
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<reg name="a1" bitsize="32" type="data_ptr"/>
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<reg name="a2" bitsize="32" type="data_ptr"/>
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<reg name="a3" bitsize="32" type="data_ptr"/>
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<reg name="a4" bitsize="32" type="data_ptr"/>
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<reg name="a5" bitsize="32" type="data_ptr"/>
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<reg name="fp" bitsize="32" type="data_ptr"/>
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<reg name="sp" bitsize="32" type="data_ptr"/>
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<reg name="ps" bitsize="32"/>
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<reg name="pc" bitsize="32" type="code_ptr"/>
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</feature>
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@ -0,0 +1,22 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2008 Free Software Foundation, Inc.
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|
||||
Copying and distribution of this file, with or without modification,
|
||||
are permitted in any medium without royalty provided the copyright
|
||||
notice and this notice are preserved. -->
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||||
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.coldfire.fp">
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<reg name="fp0" bitsize="64" type="float" group="float"/>
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<reg name="fp1" bitsize="64" type="float" group="float"/>
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<reg name="fp2" bitsize="64" type="float" group="float"/>
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<reg name="fp3" bitsize="64" type="float" group="float"/>
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<reg name="fp4" bitsize="64" type="float" group="float"/>
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<reg name="fp5" bitsize="64" type="float" group="float"/>
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<reg name="fp6" bitsize="64" type="float" group="float"/>
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<reg name="fp7" bitsize="64" type="float" group="float"/>
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<reg name="fpcontrol" bitsize="32" group="float"/>
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<reg name="fpstatus" bitsize="32" group="float"/>,
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<reg name="fpiaddr" bitsize="32" type="code_ptr" group="float"/>
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</feature>
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@ -15,5 +15,10 @@ int gdbserver_start(int);
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#else
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int gdbserver_start(const char *port);
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#endif
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/* Get or set a register. Returns the size of the register. */
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typedef int (*gdb_reg_cb)(CPUState *env, uint8_t *buf, int reg);
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void gdb_register_coprocessor(CPUState *env,
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gdb_reg_cb get_reg, gdb_reg_cb set_reg,
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int num_regs, const char *xml, int g_pos);
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#endif
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@ -173,6 +173,58 @@ void cpu_reset(CPUARMState *env)
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tlb_flush(env, 1);
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}
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static int vfp_gdb_get_reg(CPUState *env, uint8_t *buf, int reg)
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{
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int nregs;
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/* VFP data registers are always little-endian. */
|
||||
nregs = arm_feature(env, ARM_FEATURE_VFP3) ? 32 : 16;
|
||||
if (reg < nregs) {
|
||||
stfq_le_p(buf, env->vfp.regs[reg]);
|
||||
return 8;
|
||||
}
|
||||
if (arm_feature(env, ARM_FEATURE_NEON)) {
|
||||
/* Aliases for Q regs. */
|
||||
nregs += 16;
|
||||
if (reg < nregs) {
|
||||
stfq_le_p(buf, env->vfp.regs[(reg - 32) * 2]);
|
||||
stfq_le_p(buf + 8, env->vfp.regs[(reg - 32) * 2 + 1]);
|
||||
return 16;
|
||||
}
|
||||
}
|
||||
switch (reg - nregs) {
|
||||
case 0: stl_p(buf, env->vfp.xregs[ARM_VFP_FPSID]); return 4;
|
||||
case 1: stl_p(buf, env->vfp.xregs[ARM_VFP_FPSCR]); return 4;
|
||||
case 2: stl_p(buf, env->vfp.xregs[ARM_VFP_FPEXC]); return 4;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int vfp_gdb_set_reg(CPUState *env, uint8_t *buf, int reg)
|
||||
{
|
||||
int nregs;
|
||||
|
||||
nregs = arm_feature(env, ARM_FEATURE_VFP3) ? 32 : 16;
|
||||
if (reg < nregs) {
|
||||
env->vfp.regs[reg] = ldfq_le_p(buf);
|
||||
return 8;
|
||||
}
|
||||
if (arm_feature(env, ARM_FEATURE_NEON)) {
|
||||
nregs += 16;
|
||||
if (reg < nregs) {
|
||||
env->vfp.regs[(reg - 32) * 2] = ldfq_le_p(buf);
|
||||
env->vfp.regs[(reg - 32) * 2 + 1] = ldfq_le_p(buf + 8);
|
||||
return 16;
|
||||
}
|
||||
}
|
||||
switch (reg - nregs) {
|
||||
case 0: env->vfp.xregs[ARM_VFP_FPSID] = ldl_p(buf); return 4;
|
||||
case 1: env->vfp.xregs[ARM_VFP_FPSCR] = ldl_p(buf); return 4;
|
||||
case 2: env->vfp.xregs[ARM_VFP_FPEXC] = ldl_p(buf); return 4;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
CPUARMState *cpu_arm_init(const char *cpu_model)
|
||||
{
|
||||
CPUARMState *env;
|
||||
|
|
@ -194,6 +246,16 @@ CPUARMState *cpu_arm_init(const char *cpu_model)
|
|||
env->cpu_model_str = cpu_model;
|
||||
env->cp15.c0_cpuid = id;
|
||||
cpu_reset(env);
|
||||
if (arm_feature(env, ARM_FEATURE_NEON)) {
|
||||
gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg,
|
||||
51, "arm-neon.xml", 0);
|
||||
} else if (arm_feature(env, ARM_FEATURE_VFP3)) {
|
||||
gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg,
|
||||
35, "arm-vfp3.xml", 0);
|
||||
} else if (arm_feature(env, ARM_FEATURE_VFP)) {
|
||||
gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg,
|
||||
19, "arm-vfp.xml", 0);
|
||||
}
|
||||
return env;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@
|
|||
#include "cpu.h"
|
||||
#include "exec-all.h"
|
||||
#include "qemu-common.h"
|
||||
#include "gdbstub.h"
|
||||
|
||||
#include "helpers.h"
|
||||
|
||||
|
|
@ -53,6 +54,33 @@ static m68k_def_t m68k_cpu_defs[] = {
|
|||
{NULL, 0},
|
||||
};
|
||||
|
||||
static int fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n)
|
||||
{
|
||||
if (n < 8) {
|
||||
stfq_p(mem_buf, env->fregs[n]);
|
||||
return 8;
|
||||
}
|
||||
if (n < 11) {
|
||||
/* FP control registers (not implemented) */
|
||||
memset(mem_buf, 0, 4);
|
||||
return 4;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n)
|
||||
{
|
||||
if (n < 8) {
|
||||
env->fregs[n] = ldfq_p(mem_buf);
|
||||
return 8;
|
||||
}
|
||||
if (n < 11) {
|
||||
/* FP control registers (not implemented) */
|
||||
return 4;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void m68k_set_feature(CPUM68KState *env, int feature)
|
||||
{
|
||||
env->features |= (1u << feature);
|
||||
|
|
@ -105,6 +133,11 @@ static int cpu_m68k_set_model(CPUM68KState *env, const char *name)
|
|||
}
|
||||
|
||||
register_m68k_insns(env);
|
||||
if (m68k_feature (env, M68K_FEATURE_CF_FPU)) {
|
||||
gdb_register_coprocessor(env, fpu_gdb_get_reg, fpu_gdb_set_reg,
|
||||
11, "cf-fp.xml", 18);
|
||||
}
|
||||
/* TODO: Add [E]MAC registers. */
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue