Convert andn, orn and xnor to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4030 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -554,21 +554,6 @@ void OPPROTO op_tsub_T1_T0_ccTV(void)
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FORCE_RET();
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}
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void OPPROTO op_andn_T1_T0(void)
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{
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T0 &= ~T1;
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}
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void OPPROTO op_orn_T1_T0(void)
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{
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T0 |= ~T1;
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}
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void OPPROTO op_xnor_T1_T0(void)
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{
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T0 ^= ~T1;
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}
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void OPPROTO op_umul_T1_T0(void)
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{
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uint64_t res;
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@ -2613,17 +2613,20 @@ static void disas_sparc_insn(DisasContext * dc)
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tcg_gen_sub_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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break;
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case 0x5:
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gen_op_andn_T1_T0();
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tcg_gen_xori_tl(cpu_T[1], cpu_T[1], -1);
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tcg_gen_and_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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if (xop & 0x10)
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gen_op_logic_T0_cc();
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break;
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case 0x6:
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gen_op_orn_T1_T0();
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tcg_gen_xori_tl(cpu_T[1], cpu_T[1], -1);
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tcg_gen_or_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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if (xop & 0x10)
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gen_op_logic_T0_cc();
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break;
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case 0x7:
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gen_op_xnor_T1_T0();
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tcg_gen_xori_tl(cpu_T[1], cpu_T[1], -1);
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tcg_gen_xor_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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if (xop & 0x10)
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gen_op_logic_T0_cc();
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break;
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