docs/system/arm: Document FEAT_RME
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20230622143046.1578160-1-richard.henderson@linaro.org [PMM: fixed typo; note experimental status in emulation.rst too] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -435,3 +435,26 @@ As with ``sve-default-vector-length``, if the default length is larger
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than the maximum vector length enabled, the actual vector length will
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be reduced. If this property is set to ``-1`` then the default vector
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length is set to the maximum possible length.
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RME CPU Properties
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==================
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The status of RME support with QEMU is experimental. At this time we
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only support RME within the CPU proper, not within the SMMU or GIC.
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The feature is enabled by the CPU property ``x-rme``, with the ``x-``
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prefix present as a reminder of the experimental status, and defaults off.
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The method for enabling RME will change in some future QEMU release
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without notice or backward compatibility.
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RME Level 0 GPT Size Property
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-----------------------------
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To aid firmware developers in testing different possible CPU
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configurations, ``x-l0gptsz=S`` may be used to specify the value
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to encode into ``GPCCR_EL3.L0GPTSZ``, a read-only field that
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specifies the size of the Level 0 Granule Protection Table.
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Legal values for ``S`` are 30, 34, 36, and 39; the default is 30.
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As with ``x-rme``, the ``x-l0gptsz`` property may be renamed or
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removed in some future QEMU release.
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@ -66,6 +66,7 @@ the following architecture extensions:
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- FEAT_RAS (Reliability, availability, and serviceability)
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- FEAT_RASv1p1 (RAS Extension v1.1)
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- FEAT_RDM (Advanced SIMD rounding double multiply accumulate instructions)
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- FEAT_RME (Realm Management Extension) (NB: support status in QEMU is experimental)
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- FEAT_RNG (Random number generator)
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- FEAT_S2FWB (Stage 2 forced Write-Back)
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- FEAT_SB (Speculation Barrier)
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