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target/arm: [tcg,a64] Port to disas_log

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Incrementally paves the way towards using the generic instruction translation
loop.

Reviewed-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Message-Id: <150002606914.22386.15524101311003685068.stgit@frigg.lan>
[rth: Move tb->size computation and use that result.]
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Lluís Vilanova 2017-07-14 12:54:29 +03:00 committed by Richard Henderson
parent 4013f7fc81
commit 58350fa4b2
1 changed files with 14 additions and 5 deletions
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19
target/arm/translate-a64.c
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@ -11393,6 +11393,16 @@ static void aarch64_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
}
}
static void aarch64_tr_disas_log(const DisasContextBase *dcbase,
CPUState *cpu)
{
DisasContext *dc = container_of(dcbase, DisasContext, base);
qemu_log("IN: %s\n", lookup_symbol(dc->base.pc_first));
log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size,
4 | (bswap_code(dc->sctlr_b) ? 2 : 0));
}
void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs,
TranslationBlock *tb)
{
@ -11468,18 +11478,17 @@ void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs,
gen_tb_end(tb, dc->base.num_insns);
dc->base.tb->size = dc->pc - dc->base.pc_first;
dc->base.tb->icount = dc->base.num_insns;
#ifdef DEBUG_DISAS
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) &&
qemu_log_in_addr_range(dc->base.pc_first)) {
qemu_log_lock();
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(dc->base.pc_first));
log_target_disas(cs, dc->base.pc_first, dc->pc - dc->base.pc_first,
4 | (bswap_code(dc->sctlr_b) ? 2 : 0));
aarch64_tr_disas_log(&dc->base, cs);
qemu_log("\n");
qemu_log_unlock();
}
#endif
dc->base.tb->size = dc->pc - dc->base.pc_first;
dc->base.tb->icount = dc->base.num_insns;
}