gdbstub: specialise target_memory_rw_debug
The two implementations are different enough to encourage having a specialisation and we can move some of the softmmu only stuff out of gdbstub. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230302190846.2593720-16-alex.bennee@linaro.org> Message-Id: <20230303025805.625589-16-richard.henderson@linaro.org>
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@ -46,33 +46,6 @@
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#include "internals.h"
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#ifndef CONFIG_USER_ONLY
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static int phy_memory_mode;
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#endif
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static inline int target_memory_rw_debug(CPUState *cpu, target_ulong addr,
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uint8_t *buf, int len, bool is_write)
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{
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CPUClass *cc;
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#ifndef CONFIG_USER_ONLY
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if (phy_memory_mode) {
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if (is_write) {
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cpu_physical_memory_write(addr, buf, len);
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} else {
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cpu_physical_memory_read(addr, buf, len);
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}
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return 0;
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}
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#endif
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cc = CPU_GET_CLASS(cpu);
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if (cc->memory_rw_debug) {
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return cc->memory_rw_debug(cpu, addr, buf, len, is_write);
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}
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return cpu_memory_rw_debug(cpu, addr, buf, len, is_write);
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}
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typedef struct GDBRegisterState {
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int base_reg;
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int num_regs;
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@ -1196,7 +1169,7 @@ static void handle_write_mem(GArray *params, void *user_ctx)
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gdb_hextomem(gdbserver_state.mem_buf, get_param(params, 2)->data,
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get_param(params, 1)->val_ull);
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if (target_memory_rw_debug(gdbserver_state.g_cpu,
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if (gdb_target_memory_rw_debug(gdbserver_state.g_cpu,
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get_param(params, 0)->val_ull,
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gdbserver_state.mem_buf->data,
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gdbserver_state.mem_buf->len, true)) {
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@ -1223,7 +1196,7 @@ static void handle_read_mem(GArray *params, void *user_ctx)
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g_byte_array_set_size(gdbserver_state.mem_buf,
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get_param(params, 1)->val_ull);
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if (target_memory_rw_debug(gdbserver_state.g_cpu,
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if (gdb_target_memory_rw_debug(gdbserver_state.g_cpu,
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get_param(params, 0)->val_ull,
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gdbserver_state.mem_buf->data,
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gdbserver_state.mem_buf->len, false)) {
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@ -1676,30 +1649,6 @@ static void handle_query_qemu_supported(GArray *params, void *user_ctx)
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gdb_put_strbuf();
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}
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#ifndef CONFIG_USER_ONLY
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static void handle_query_qemu_phy_mem_mode(GArray *params,
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void *user_ctx)
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{
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g_string_printf(gdbserver_state.str_buf, "%d", phy_memory_mode);
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gdb_put_strbuf();
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}
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static void handle_set_qemu_phy_mem_mode(GArray *params, void *user_ctx)
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{
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if (!params->len) {
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gdb_put_packet("E22");
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return;
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}
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if (!get_param(params, 0)->val_ul) {
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phy_memory_mode = 0;
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} else {
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phy_memory_mode = 1;
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}
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gdb_put_packet("OK");
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}
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#endif
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static const GdbCmdParseEntry gdb_gen_query_set_common_table[] = {
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/* Order is important if has same prefix */
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{
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@ -1790,7 +1739,7 @@ static const GdbCmdParseEntry gdb_gen_query_table[] = {
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},
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#ifndef CONFIG_USER_ONLY
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{
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.handler = handle_query_qemu_phy_mem_mode,
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.handler = gdb_handle_query_qemu_phy_mem_mode,
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.cmd = "qemu.PhyMemMode",
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},
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#endif
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@ -1806,7 +1755,7 @@ static const GdbCmdParseEntry gdb_gen_set_table[] = {
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},
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#ifndef CONFIG_USER_ONLY
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{
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.handler = handle_set_qemu_phy_mem_mode,
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.handler = gdb_handle_set_qemu_phy_mem_mode,
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.cmd = "qemu.PhyMemMode:",
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.cmd_startswith = 1,
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.schema = "l0"
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@ -185,6 +185,10 @@ void gdb_handle_query_xfer_auxv(GArray *params, void *user_ctx); /*user */
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void gdb_handle_query_attached(GArray *params, void *user_ctx); /* both */
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/* softmmu only */
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void gdb_handle_query_qemu_phy_mem_mode(GArray *params, void *user_ctx);
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void gdb_handle_set_qemu_phy_mem_mode(GArray *params, void *user_ctx);
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/*
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* Break/Watch point support - there is an implementation for softmmu
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* and user mode.
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@ -194,4 +198,19 @@ int gdb_breakpoint_insert(CPUState *cs, int type, vaddr addr, vaddr len);
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int gdb_breakpoint_remove(CPUState *cs, int type, vaddr addr, vaddr len);
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void gdb_breakpoint_remove_all(CPUState *cs);
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/**
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* gdb_target_memory_rw_debug() - handle debug access to memory
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* @cs: CPUState
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* @addr: nominal address, could be an entire physical address
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* @buf: data
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* @len: length of access
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* @is_write: is it a write operation
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*
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* This function is specialised depending on the mode we are running
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* in. For softmmu guests we can switch the interpretation of the
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* address to a physical address.
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*/
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int gdb_target_memory_rw_debug(CPUState *cs, hwaddr addr,
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uint8_t *buf, int len, bool is_write);
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#endif /* GDBSTUB_INTERNALS_H */
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@ -413,9 +413,60 @@ void gdb_exit(int code)
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qemu_chr_fe_deinit(&gdbserver_system_state.chr, true);
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}
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/*
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* Memory access
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*/
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static int phy_memory_mode;
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int gdb_target_memory_rw_debug(CPUState *cpu, hwaddr addr,
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uint8_t *buf, int len, bool is_write)
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{
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CPUClass *cc;
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if (phy_memory_mode) {
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if (is_write) {
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cpu_physical_memory_write(addr, buf, len);
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} else {
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cpu_physical_memory_read(addr, buf, len);
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}
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return 0;
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}
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cc = CPU_GET_CLASS(cpu);
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if (cc->memory_rw_debug) {
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return cc->memory_rw_debug(cpu, addr, buf, len, is_write);
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}
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return cpu_memory_rw_debug(cpu, addr, buf, len, is_write);
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}
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/*
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* Softmmu specific command helpers
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*/
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void gdb_handle_query_qemu_phy_mem_mode(GArray *params,
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void *user_ctx)
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{
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g_string_printf(gdbserver_state.str_buf, "%d", phy_memory_mode);
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gdb_put_strbuf();
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}
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void gdb_handle_set_qemu_phy_mem_mode(GArray *params, void *user_ctx)
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{
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if (!params->len) {
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gdb_put_packet("E22");
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return;
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}
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if (!get_param(params, 0)->val_ul) {
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phy_memory_mode = 0;
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} else {
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phy_memory_mode = 1;
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}
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gdb_put_packet("OK");
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}
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void gdb_handle_query_rcmd(GArray *params, void *user_ctx)
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{
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const guint8 zero = 0;
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@ -378,6 +378,21 @@ int gdb_continue_partial(char *newstates)
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return res;
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}
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/*
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* Memory access helpers
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*/
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int gdb_target_memory_rw_debug(CPUState *cpu, hwaddr addr,
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uint8_t *buf, int len, bool is_write)
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{
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CPUClass *cc;
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cc = CPU_GET_CLASS(cpu);
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if (cc->memory_rw_debug) {
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return cc->memory_rw_debug(cpu, addr, buf, len, is_write);
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}
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return cpu_memory_rw_debug(cpu, addr, buf, len, is_write);
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}
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/*
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* Break/Watch point helpers
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*/
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