target-arm: Allow STATE_BOTH reginfo descriptions for more than cp14
Currently the STATE_BOTH shorthand for allowing a single reginfo struct to define handling for both AArch32 and AArch64 views of a register only permits this where the AArch32 view is in cp15. It turns out that the debug registers in cp14 also have neatly lined up encodings; allow these also to share reginfo structs by permitting a STATE_BOTH reginfo to specify the .cp field (and continue to default to 15 if it is not specified). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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@ -2800,9 +2800,11 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r,
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/* The AArch32 view of a shared register sees the lower 32 bits
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/* The AArch32 view of a shared register sees the lower 32 bits
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* of a 64 bit backing field. It is not migratable as the AArch64
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* of a 64 bit backing field. It is not migratable as the AArch64
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* view handles that. AArch64 also handles reset.
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* view handles that. AArch64 also handles reset.
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* We assume it is a cp15 register.
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* We assume it is a cp15 register if the .cp field is left unset.
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*/
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*/
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r2->cp = 15;
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if (r2->cp == 0) {
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r2->cp = 15;
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}
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r2->type |= ARM_CP_NO_MIGRATE;
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r2->type |= ARM_CP_NO_MIGRATE;
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r2->resetfn = arm_cp_reset_ignore;
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r2->resetfn = arm_cp_reset_ignore;
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#ifdef HOST_WORDS_BIGENDIAN
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#ifdef HOST_WORDS_BIGENDIAN
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@ -2815,8 +2817,11 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r,
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/* To allow abbreviation of ARMCPRegInfo
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/* To allow abbreviation of ARMCPRegInfo
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* definitions, we treat cp == 0 as equivalent to
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* definitions, we treat cp == 0 as equivalent to
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* the value for "standard guest-visible sysreg".
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* the value for "standard guest-visible sysreg".
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* STATE_BOTH definitions are also always "standard
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* sysreg" in their AArch64 view (the .cp value may
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* be non-zero for the benefit of the AArch32 view).
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*/
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*/
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if (r->cp == 0) {
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if (r->cp == 0 || r->state == ARM_CP_STATE_BOTH) {
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r2->cp = CP_REG_ARM64_SYSREG_CP;
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r2->cp = CP_REG_ARM64_SYSREG_CP;
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}
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}
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*key = ENCODE_AA64_CP_REG(r2->cp, r2->crn, crm,
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*key = ENCODE_AA64_CP_REG(r2->cp, r2->crn, crm,
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