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ppc4xx: Add device models found in PPC440 core SoCs

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These devices are found in newer SoCs based on 440 core e.g. the 460EX
(http://www.embeddeddeveloper.com/assets/processors/amcc/datasheets/
PP460EX_DS2063.pdf)

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
BALATON Zoltan 2018-02-15 22:27:06 +01:00 committed by David Gibson
parent 4f5b039d2b
commit 58d5b22bbd
3 changed files with 1186 additions and 1 deletions
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26
hw/ppc/ppc440.h Normal file
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@ -0,0 +1,26 @@
/*
* QEMU PowerPC 440 shared definitions
*
* Copyright (c) 2012 François Revol
* Copyright (c) 2016-2018 BALATON Zoltan
*
* This work is licensed under the GNU GPL license version 2 or later.
*
*/
#ifndef PPC440_H
#define PPC440_H
#include "hw/ppc/ppc.h"
void ppc4xx_l2sram_init(CPUPPCState *env);
void ppc4xx_cpr_init(CPUPPCState *env);
void ppc4xx_sdr_init(CPUPPCState *env);
void ppc440_sdram_init(CPUPPCState *env, int nbanks,
MemoryRegion *ram_memories,
hwaddr *ram_bases, hwaddr *ram_sizes,
int do_init);
void ppc4xx_ahb_init(CPUPPCState *env);
void ppc460ex_pcie_init(CPUPPCState *env);
#endif /* PPC440_H */

1159
hw/ppc/ppc440_uc.c Normal file
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2
include/hw/pci/pcie_host.h
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@ -65,7 +65,7 @@ void pcie_host_mmcfg_update(PCIExpressHost *e,
* bit 12 - 14: function number * bit 12 - 14: function number
* bit 0 - 11: offset in configuration space of a given device * bit 0 - 11: offset in configuration space of a given device
*/ */
#define PCIE_MMCFG_SIZE_MAX (1ULL << 28) #define PCIE_MMCFG_SIZE_MAX (1ULL << 29)
#define PCIE_MMCFG_SIZE_MIN (1ULL << 20) #define PCIE_MMCFG_SIZE_MIN (1ULL << 20)
#define PCIE_MMCFG_BUS_BIT 20 #define PCIE_MMCFG_BUS_BIT 20
#define PCIE_MMCFG_BUS_MASK 0x1ff #define PCIE_MMCFG_BUS_MASK 0x1ff