target-arm: Use new deposit and extract ops
Use the new primitives for UBFX and SBFX. Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson
parent
f49f1ae73b
commit
59a71b4c5b
@ -3216,67 +3216,44 @@ static void disas_bitfield(DisasContext *s, uint32_t insn)
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low 32-bits anyway. */
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tcg_tmp = read_cpu_reg(s, rn, 1);
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/* Recognize the common aliases. */
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if (opc == 0) { /* SBFM */
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if (ri == 0) {
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if (si == 7) { /* SXTB */
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tcg_gen_ext8s_i64(tcg_rd, tcg_tmp);
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goto done;
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} else if (si == 15) { /* SXTH */
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tcg_gen_ext16s_i64(tcg_rd, tcg_tmp);
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goto done;
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} else if (si == 31) { /* SXTW */
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tcg_gen_ext32s_i64(tcg_rd, tcg_tmp);
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goto done;
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}
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}
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if (si == 63 || (si == 31 && ri <= si)) { /* ASR */
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if (si == 31) {
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tcg_gen_ext32s_i64(tcg_tmp, tcg_tmp);
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}
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tcg_gen_sari_i64(tcg_rd, tcg_tmp, ri);
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goto done;
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}
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} else if (opc == 2) { /* UBFM */
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if (ri == 0) { /* UXTB, UXTH, plus non-canonical AND */
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tcg_gen_andi_i64(tcg_rd, tcg_tmp, bitmask64(si + 1));
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return;
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}
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if (si == 63 || (si == 31 && ri <= si)) { /* LSR */
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if (si == 31) {
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tcg_gen_ext32u_i64(tcg_tmp, tcg_tmp);
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}
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tcg_gen_shri_i64(tcg_rd, tcg_tmp, ri);
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return;
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}
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if (si + 1 == ri && si != bitsize - 1) { /* LSL */
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int shift = bitsize - 1 - si;
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tcg_gen_shli_i64(tcg_rd, tcg_tmp, shift);
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goto done;
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}
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}
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if (opc != 1) { /* SBFM or UBFM */
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tcg_gen_movi_i64(tcg_rd, 0);
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}
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/* do the bit move operation */
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if (si >= ri) {
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/* Recognize simple(r) extractions. */
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if (si <= ri) {
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/* Wd<s-r:0> = Wn<s:r> */
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tcg_gen_shri_i64(tcg_tmp, tcg_tmp, ri);
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pos = 0;
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len = (si - ri) + 1;
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if (opc == 0) { /* SBFM: ASR, SBFX, SXTB, SXTH, SXTW */
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tcg_gen_sextract_i64(tcg_rd, tcg_tmp, ri, len);
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goto done;
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} else if (opc == 2) { /* UBFM: UBFX, LSR, UXTB, UXTH */
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tcg_gen_extract_i64(tcg_rd, tcg_tmp, ri, len);
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return;
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}
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/* opc == 1, BXFIL fall through to deposit */
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tcg_gen_extract_i64(tcg_tmp, tcg_tmp, ri, len);
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pos = 0;
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} else {
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/* Wd<32+s-r,32-r> = Wn<s:0> */
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pos = bitsize - ri;
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/* Handle the ri > si case with a deposit
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* Wd<32+s-r,32-r> = Wn<s:0>
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*/
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len = si + 1;
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pos = (bitsize - ri) & (bitsize - 1);
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}
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tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len);
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if (opc == 0 && len < ri) {
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/* SBFM: sign extend the destination field from len to fill
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the balance of the word. Let the deposit below insert all
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of those sign bits. */
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tcg_gen_sextract_i64(tcg_tmp, tcg_tmp, 0, len);
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len = ri;
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}
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if (opc == 0) { /* SBFM - sign extend the destination field */
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tcg_gen_shli_i64(tcg_rd, tcg_rd, 64 - (pos + len));
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tcg_gen_sari_i64(tcg_rd, tcg_rd, 64 - (pos + len));
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if (opc == 1) { /* BFM, BXFIL */
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tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len);
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} else {
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/* SBFM or UBFM: We start with zero, and we haven't modified
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any bits outside bitsize, therefore the zero-extension
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below is unneeded. */
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tcg_gen_deposit_z_i64(tcg_rd, tcg_tmp, pos, len);
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return;
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}
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done:
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@ -288,29 +288,6 @@ static void gen_revsh(TCGv_i32 var)
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tcg_gen_ext16s_i32(var, var);
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}
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/* Unsigned bitfield extract. */
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static void gen_ubfx(TCGv_i32 var, int shift, uint32_t mask)
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{
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if (shift)
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tcg_gen_shri_i32(var, var, shift);
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tcg_gen_andi_i32(var, var, mask);
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}
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/* Signed bitfield extract. */
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static void gen_sbfx(TCGv_i32 var, int shift, int width)
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{
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uint32_t signbit;
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if (shift)
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tcg_gen_sari_i32(var, var, shift);
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if (shift + width < 32) {
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signbit = 1u << (width - 1);
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tcg_gen_andi_i32(var, var, (1u << width) - 1);
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tcg_gen_xori_i32(var, var, signbit);
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tcg_gen_subi_i32(var, var, signbit);
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}
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}
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/* Return (b << 32) + a. Mark inputs as dead */
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static TCGv_i64 gen_addq_msw(TCGv_i64 a, TCGv_i32 b)
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{
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@ -9178,9 +9155,9 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
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goto illegal_op;
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if (i < 32) {
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if (op1 & 0x20) {
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gen_ubfx(tmp, shift, (1u << i) - 1);
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tcg_gen_extract_i32(tmp, tmp, shift, i);
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} else {
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gen_sbfx(tmp, shift, i);
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tcg_gen_sextract_i32(tmp, tmp, shift, i);
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}
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}
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store_reg(s, rd, tmp);
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@ -10497,15 +10474,17 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
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imm++;
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if (shift + imm > 32)
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goto illegal_op;
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if (imm < 32)
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gen_sbfx(tmp, shift, imm);
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if (imm < 32) {
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tcg_gen_sextract_i32(tmp, tmp, shift, imm);
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}
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break;
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case 6: /* Unsigned bitfield extract. */
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imm++;
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if (shift + imm > 32)
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goto illegal_op;
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if (imm < 32)
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gen_ubfx(tmp, shift, (1u << imm) - 1);
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if (imm < 32) {
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tcg_gen_extract_i32(tmp, tmp, shift, imm);
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}
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break;
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case 3: /* Bitfield insert/clear. */
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if (imm < shift)
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