target-arm: Add HPFAR_EL2
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-2-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -279,6 +279,7 @@ typedef struct CPUARMState {
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};
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};
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uint64_t far_el[4];
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uint64_t far_el[4];
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};
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};
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uint64_t hpfar_el2;
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union { /* Translation result. */
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union { /* Translation result. */
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struct {
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struct {
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uint64_t _unused_par_0;
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uint64_t _unused_par_0;
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@ -3230,6 +3230,10 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = {
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{ .name = "MDCR_EL2", .state = ARM_CP_STATE_BOTH,
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{ .name = "MDCR_EL2", .state = ARM_CP_STATE_BOTH,
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.opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 1,
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.opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 1,
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.access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
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.access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
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{ .name = "HPFAR_EL2", .state = ARM_CP_STATE_BOTH,
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.opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4,
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.access = PL2_RW, .accessfn = access_el3_aa32ns_aa64any,
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.type = ARM_CP_CONST, .resetvalue = 0 },
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REGINFO_SENTINEL
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REGINFO_SENTINEL
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};
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};
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@ -3476,6 +3480,14 @@ static const ARMCPRegInfo el2_cp_reginfo[] = {
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.opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 1,
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.opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 1,
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.access = PL2_RW, .resetvalue = 0,
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.access = PL2_RW, .resetvalue = 0,
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.fieldoffset = offsetof(CPUARMState, cp15.mdcr_el2), },
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.fieldoffset = offsetof(CPUARMState, cp15.mdcr_el2), },
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{ .name = "HPFAR", .state = ARM_CP_STATE_AA32,
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.cp = 15, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4,
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.access = PL2_RW, .accessfn = access_el3_aa32ns,
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.fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) },
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{ .name = "HPFAR_EL2", .state = ARM_CP_STATE_AA64,
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.opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4,
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.access = PL2_RW,
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.fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) },
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REGINFO_SENTINEL
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REGINFO_SENTINEL
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};
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};
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