pflash_cfi01: change to new-style MMIO accessors
This is a required step to implement read_with_attrs and write_with_attrs. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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e98094221e
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5aa113f0a2
@ -650,101 +650,25 @@ static void pflash_write(pflash_t *pfl, hwaddr offset,
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}
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static uint32_t pflash_readb_be(void *opaque, hwaddr addr)
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{
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return pflash_read(opaque, addr, 1, 1);
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}
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static uint32_t pflash_readb_le(void *opaque, hwaddr addr)
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{
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return pflash_read(opaque, addr, 1, 0);
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}
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static uint32_t pflash_readw_be(void *opaque, hwaddr addr)
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static uint64_t pflash_mem_read(void *opaque, hwaddr addr, unsigned len)
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{
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pflash_t *pfl = opaque;
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bool be = !!(pfl->features & (1 << PFLASH_BE));
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return pflash_read(pfl, addr, 2, 1);
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return pflash_read(pfl, addr, len, be);
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}
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static uint32_t pflash_readw_le(void *opaque, hwaddr addr)
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static void pflash_mem_write(void *opaque, hwaddr addr, uint64_t value, unsigned len)
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{
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pflash_t *pfl = opaque;
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bool be = !!(pfl->features & (1 << PFLASH_BE));
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return pflash_read(pfl, addr, 2, 0);
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pflash_write(pfl, addr, value, len, be);
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}
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static uint32_t pflash_readl_be(void *opaque, hwaddr addr)
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{
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pflash_t *pfl = opaque;
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return pflash_read(pfl, addr, 4, 1);
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}
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static uint32_t pflash_readl_le(void *opaque, hwaddr addr)
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{
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pflash_t *pfl = opaque;
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return pflash_read(pfl, addr, 4, 0);
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}
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static void pflash_writeb_be(void *opaque, hwaddr addr,
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uint32_t value)
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{
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pflash_write(opaque, addr, value, 1, 1);
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}
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static void pflash_writeb_le(void *opaque, hwaddr addr,
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uint32_t value)
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{
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pflash_write(opaque, addr, value, 1, 0);
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}
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static void pflash_writew_be(void *opaque, hwaddr addr,
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uint32_t value)
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{
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pflash_t *pfl = opaque;
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pflash_write(pfl, addr, value, 2, 1);
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}
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static void pflash_writew_le(void *opaque, hwaddr addr,
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uint32_t value)
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{
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pflash_t *pfl = opaque;
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pflash_write(pfl, addr, value, 2, 0);
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}
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static void pflash_writel_be(void *opaque, hwaddr addr,
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uint32_t value)
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{
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pflash_t *pfl = opaque;
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pflash_write(pfl, addr, value, 4, 1);
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}
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static void pflash_writel_le(void *opaque, hwaddr addr,
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uint32_t value)
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{
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pflash_t *pfl = opaque;
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pflash_write(pfl, addr, value, 4, 0);
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}
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static const MemoryRegionOps pflash_cfi01_ops_be = {
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.old_mmio = {
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.read = { pflash_readb_be, pflash_readw_be, pflash_readl_be, },
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.write = { pflash_writeb_be, pflash_writew_be, pflash_writel_be, },
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},
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static const MemoryRegionOps pflash_cfi01_ops_le = {
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.old_mmio = {
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.read = { pflash_readb_le, pflash_readw_le, pflash_readl_le, },
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.write = { pflash_writeb_le, pflash_writew_le, pflash_writel_le, },
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},
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static const MemoryRegionOps pflash_cfi01_ops = {
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.read = pflash_mem_read,
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.write = pflash_mem_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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@ -775,7 +699,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
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memory_region_init_rom_device(
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&pfl->mem, OBJECT(dev),
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pfl->features & (1 << PFLASH_BE) ? &pflash_cfi01_ops_be : &pflash_cfi01_ops_le,
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&pflash_cfi01_ops,
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pfl,
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pfl->name, total_len, &local_err);
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if (local_err) {
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