From 5b07f441022c1114073c05cdffd1bb829cbc31c5 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Sat, 28 May 2022 10:02:11 +0100 Subject: [PATCH] hw/acpi/piix4: change smm_enabled from int to bool MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is in preparation for conversion to a qdev property. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ani Sinha Message-Id: <20220528091934.15520-3-mark.cave-ayland@ilande.co.uk> [PMD: Change simm_enabled from int to bool, suggested by Ani Sinha] Reviewed-by: Bernhard Beschow Signed-off-by: Philippe Mathieu-Daudé --- hw/acpi/piix4.c | 4 ++-- include/hw/southbridge/piix.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index bf20fa139b..558c250884 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -74,7 +74,7 @@ struct PIIX4PMState { qemu_irq irq; qemu_irq smi_irq; - int smm_enabled; + bool smm_enabled; bool smm_compat; Notifier machine_ready; Notifier powerdown_notifier; @@ -538,7 +538,7 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp) I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, qemu_irq sci_irq, qemu_irq smi_irq, - int smm_enabled, DeviceState **piix4_pm) + bool smm_enabled, DeviceState **piix4_pm) { PCIDevice *pci_dev; DeviceState *dev; diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index f63f83e5c6..ff8d96ae8c 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -19,7 +19,7 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, qemu_irq sci_irq, qemu_irq smi_irq, - int smm_enabled, DeviceState **piix4_pm); + bool smm_enabled, DeviceState **piix4_pm); /* PIRQRC[A:D]: PIRQx Route Control Registers */ #define PIIX_PIRQCA 0x60