uhci: No need to handle async completion of isoc packets
No devices ever return async for isoc endpoints and the core already enforces this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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@ -101,7 +101,6 @@ struct UHCIAsync {
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UHCIQueue *queue;
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QTAILQ_ENTRY(UHCIAsync) next;
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uint32_t td;
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uint8_t isoc;
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uint8_t done;
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};
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@ -849,7 +848,6 @@ static int uhci_handle_td(UHCIState *s, uint32_t addr, UHCI_TD *td,
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* for initial isochronous requests
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*/
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async->queue->valid = 32;
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async->isoc = td->ctrl & TD_CTRL_IOS;
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max_len = ((td->token >> 21) + 1) & 0x7ff;
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pid = td->token & 0xff;
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@ -911,30 +909,9 @@ static void uhci_async_complete(USBPort *port, USBPacket *packet)
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return;
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}
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if (async->isoc) {
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UHCI_TD td;
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uint32_t link = async->td;
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uint32_t int_mask = 0, val;
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pci_dma_read(&s->dev, link & ~0xf, &td, sizeof(td));
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le32_to_cpus(&td.link);
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le32_to_cpus(&td.ctrl);
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le32_to_cpus(&td.token);
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le32_to_cpus(&td.buffer);
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uhci_async_unlink(async);
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uhci_complete_td(s, &td, async, &int_mask);
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s->pending_int_mask |= int_mask;
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/* update the status bits of the TD */
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val = cpu_to_le32(td.ctrl);
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pci_dma_write(&s->dev, (link & ~0xf) + 4, &val, sizeof(val));
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uhci_async_free(async);
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} else {
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async->done = 1;
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if (s->frame_bytes < s->frame_bandwidth) {
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qemu_bh_schedule(s->bh);
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}
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async->done = 1;
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if (s->frame_bytes < s->frame_bandwidth) {
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qemu_bh_schedule(s->bh);
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}
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}
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