target-alpha: Trap for unassigned and unaligned addresses.
Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -325,7 +325,7 @@ static inline tb_page_addr_t get_page_addr_code(CPUState *env1, target_ulong add
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}
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pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK;
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if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
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#if defined(TARGET_SPARC) || defined(TARGET_MIPS)
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#if defined(TARGET_ALPHA) || defined(TARGET_MIPS) || defined(TARGET_SPARC)
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do_unassigned_access(addr, 0, 1, 0, 4);
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#else
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cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr);
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12
exec.c
12
exec.c
@ -3181,7 +3181,7 @@ static uint32_t unassigned_mem_readb(void *opaque, target_phys_addr_t addr)
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#ifdef DEBUG_UNASSIGNED
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printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
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#endif
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#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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do_unassigned_access(addr, 0, 0, 0, 1);
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#endif
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return 0;
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@ -3192,7 +3192,7 @@ static uint32_t unassigned_mem_readw(void *opaque, target_phys_addr_t addr)
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#ifdef DEBUG_UNASSIGNED
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printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
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#endif
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#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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do_unassigned_access(addr, 0, 0, 0, 2);
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#endif
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return 0;
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@ -3203,7 +3203,7 @@ static uint32_t unassigned_mem_readl(void *opaque, target_phys_addr_t addr)
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#ifdef DEBUG_UNASSIGNED
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printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
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#endif
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#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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do_unassigned_access(addr, 0, 0, 0, 4);
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#endif
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return 0;
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@ -3214,7 +3214,7 @@ static void unassigned_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_
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#ifdef DEBUG_UNASSIGNED
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printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
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#endif
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#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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do_unassigned_access(addr, 1, 0, 0, 1);
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#endif
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}
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@ -3224,7 +3224,7 @@ static void unassigned_mem_writew(void *opaque, target_phys_addr_t addr, uint32_
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#ifdef DEBUG_UNASSIGNED
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printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
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#endif
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#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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do_unassigned_access(addr, 1, 0, 0, 2);
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#endif
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}
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@ -3234,7 +3234,7 @@ static void unassigned_mem_writel(void *opaque, target_phys_addr_t addr, uint32_
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#ifdef DEBUG_UNASSIGNED
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printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
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#endif
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#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
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do_unassigned_access(addr, 1, 0, 0, 4);
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#endif
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}
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@ -434,7 +434,11 @@ void do_interrupt (CPUState *env);
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uint64_t cpu_alpha_load_fpcr (CPUState *env);
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void cpu_alpha_store_fpcr (CPUState *env, uint64_t val);
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extern void swap_shadow_regs(CPUState *env);
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#ifndef CONFIG_USER_ONLY
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void swap_shadow_regs(CPUState *env);
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extern QEMU_NORETURN void do_unassigned_access(target_phys_addr_t addr,
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int, int, int, int);
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#endif
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/* Bits in TB->FLAGS that control how translation is processed. */
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enum {
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@ -1265,7 +1265,33 @@ uint64_t helper_stq_c_phys(uint64_t p, uint64_t v)
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return ret;
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}
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static void QEMU_NORETURN do_unaligned_access(target_ulong addr, int is_write,
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int is_user, void *retaddr)
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{
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uint64_t pc;
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uint32_t insn;
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do_restore_state(retaddr);
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pc = env->pc;
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insn = ldl_code(pc);
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env->trap_arg0 = addr;
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env->trap_arg1 = insn >> 26; /* opcode */
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env->trap_arg2 = (insn >> 21) & 31; /* dest regno */
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helper_excp(EXCP_UNALIGN, 0);
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}
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void QEMU_NORETURN do_unassigned_access(target_phys_addr_t addr, int is_write,
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int is_exec, int unused, int size)
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{
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env->trap_arg0 = addr;
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env->trap_arg1 = is_write;
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dynamic_excp(EXCP_MCHK, 0);
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}
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#define MMUSUFFIX _mmu
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#define ALIGNED_ONLY
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#define SHIFT 0
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#include "softmmu_template.h"
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