target/xtensa: drop DisasContext::litbase
It doesn't help much, always-set bit 0 of the LITBASE SR is easy to compensate with decrement of the l32r immediate argument. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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@ -59,7 +59,6 @@ typedef struct DisasContext {
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int ring;
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uint32_t lbeg;
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uint32_t lend;
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TCGv_i32 litbase;
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int is_jmp;
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int singlestep_enabled;
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@ -261,21 +260,6 @@ static inline bool option_enabled(DisasContext *dc, int opt)
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return xtensa_option_enabled(dc->config, opt);
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}
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static void init_litbase(DisasContext *dc)
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{
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if (dc->tb->flags & XTENSA_TBFLAG_LITBASE) {
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dc->litbase = tcg_temp_local_new_i32();
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tcg_gen_andi_i32(dc->litbase, cpu_SR[LITBASE], 0xfffff000);
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}
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}
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static void reset_litbase(DisasContext *dc)
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{
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if (dc->tb->flags & XTENSA_TBFLAG_LITBASE) {
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tcg_temp_free(dc->litbase);
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}
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}
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static void init_sar_tracker(DisasContext *dc)
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{
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dc->sar_5bit = false;
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@ -1089,7 +1073,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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dc.slotbuf = xtensa_insnbuf_alloc(dc.config->isa);
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}
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init_litbase(&dc);
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init_sar_tracker(&dc);
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if (dc.icount) {
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dc.next_icount = tcg_temp_local_new_i32();
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@ -1164,7 +1147,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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dc.pc + xtensa_insn_len(env, &dc) <= next_page_start &&
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!tcg_op_buf_full());
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done:
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reset_litbase(&dc);
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reset_sar_tracker(&dc);
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if (dc.icount) {
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tcg_temp_free(dc.next_icount);
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@ -1667,12 +1649,13 @@ static void translate_l32r(DisasContext *dc, const uint32_t arg[],
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const uint32_t par[])
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{
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if (gen_window_check1(dc, arg[0])) {
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TCGv_i32 tmp = (dc->tb->flags & XTENSA_TBFLAG_LITBASE) ?
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tcg_const_i32(dc->raw_arg[1] - 1) :
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tcg_const_i32(arg[1]);
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TCGv_i32 tmp;
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if (dc->tb->flags & XTENSA_TBFLAG_LITBASE) {
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tcg_gen_add_i32(tmp, tmp, dc->litbase);
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tmp = tcg_const_i32(dc->raw_arg[1] - 1);
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tcg_gen_add_i32(tmp, cpu_SR[LITBASE], tmp);
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} else {
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tmp = tcg_const_i32(arg[1]);
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}
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tcg_gen_qemu_ld32u(cpu_R[arg[0]], tmp, dc->cring);
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tcg_temp_free(tmp);
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