OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

target/mips: Drop tcg_temp_free from mxu_translate.c 

Translators are no longer required to free tcg temporaries.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-02-24 19:23:53 -10:00
parent ac66a187d8
commit 5c348e4833
1 changed files with 0 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

51
target/mips/tcg/mxu_translate.c
View File

@ -513,8 +513,6 @@ static void gen_mxu_s32i2m(DisasContext *ctx)
} else if (XRa == 16) { } else if (XRa == 16) {
gen_store_mxu_cr(t0); gen_store_mxu_cr(t0);
} }
tcg_temp_free(t0);
} }
/* /*
@ -537,8 +535,6 @@ static void gen_mxu_s32m2i(DisasContext *ctx)
} }
gen_store_gpr(t0, Rb); gen_store_gpr(t0, Rb);
tcg_temp_free(t0);
} }
/* /*
@ -613,9 +609,6 @@ static void gen_mxu_s8ldd(DisasContext *ctx)
} }
gen_store_mxu_gpr(t0, XRa); gen_store_mxu_gpr(t0, XRa);
tcg_temp_free(t0);
tcg_temp_free(t1);
} }
/* /*
@ -664,11 +657,6 @@ static void gen_mxu_d16mul(DisasContext *ctx)
} }
gen_store_mxu_gpr(t3, XRa); gen_store_mxu_gpr(t3, XRa);
gen_store_mxu_gpr(t2, XRd); gen_store_mxu_gpr(t2, XRd);
tcg_temp_free(t0);
tcg_temp_free(t1);
tcg_temp_free(t2);
tcg_temp_free(t3);
} }
/* /*
@ -741,11 +729,6 @@ static void gen_mxu_d16mac(DisasContext *ctx)
} }
gen_store_mxu_gpr(t3, XRa); gen_store_mxu_gpr(t3, XRa);
gen_store_mxu_gpr(t2, XRd); gen_store_mxu_gpr(t2, XRd);
tcg_temp_free(t0);
tcg_temp_free(t1);
tcg_temp_free(t2);
tcg_temp_free(t3);
} }
/* /*
@ -821,15 +804,6 @@ static void gen_mxu_q8mul_q8mulsu(DisasContext *ctx)
gen_store_mxu_gpr(t0, XRd); gen_store_mxu_gpr(t0, XRd);
gen_store_mxu_gpr(t1, XRa); gen_store_mxu_gpr(t1, XRa);
tcg_temp_free(t0);
tcg_temp_free(t1);
tcg_temp_free(t2);
tcg_temp_free(t3);
tcg_temp_free(t4);
tcg_temp_free(t5);
tcg_temp_free(t6);
tcg_temp_free(t7);
} }
/* /*
@ -860,9 +834,6 @@ static void gen_mxu_s32ldd_s32lddr(DisasContext *ctx)
tcg_gen_qemu_ld_tl(t1, t1, ctx->mem_idx, MO_TESL ^ (sel * MO_BSWAP)); tcg_gen_qemu_ld_tl(t1, t1, ctx->mem_idx, MO_TESL ^ (sel * MO_BSWAP));
gen_store_mxu_gpr(t1, XRa); gen_store_mxu_gpr(t1, XRa);
tcg_temp_free(t0);
tcg_temp_free(t1);
} }
@ -1125,9 +1096,6 @@ static void gen_mxu_D16MAX_D16MIN(DisasContext *ctx)
tcg_gen_shri_i32(t0, t0, 16); tcg_gen_shri_i32(t0, t0, 16);
/* finally update the destination */ /* finally update the destination */
tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0); tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0);
tcg_temp_free(t1);
tcg_temp_free(t0);
} else if (unlikely(XRb == XRc)) { } else if (unlikely(XRb == XRc)) {
/* both operands same -> just set destination to one of them */ /* both operands same -> just set destination to one of them */
tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
@ -1161,9 +1129,6 @@ static void gen_mxu_D16MAX_D16MIN(DisasContext *ctx)
tcg_gen_shri_i32(t0, t0, 16); tcg_gen_shri_i32(t0, t0, 16);
/* finally update the destination */ /* finally update the destination */
tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0); tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0);
tcg_temp_free(t1);
tcg_temp_free(t0);
} }
} }
@ -1226,9 +1191,6 @@ static void gen_mxu_Q8MAX_Q8MIN(DisasContext *ctx)
/* finally update the destination */ /* finally update the destination */
tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0); tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0);
} }
tcg_temp_free(t1);
tcg_temp_free(t0);
} else if (unlikely(XRb == XRc)) { } else if (unlikely(XRb == XRc)) {
/* both operands same -> just set destination to one of them */ /* both operands same -> just set destination to one of them */
tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]);
@ -1266,9 +1228,6 @@ static void gen_mxu_Q8MAX_Q8MIN(DisasContext *ctx)
/* finally update the destination */ /* finally update the destination */
tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0); tcg_gen_or_i32(mxu_gpr[XRa - 1], mxu_gpr[XRa - 1], t0);
} }
tcg_temp_free(t1);
tcg_temp_free(t0);
} }
} }
@ -1384,9 +1343,6 @@ static void gen_mxu_S32ALNI(DisasContext *ctx)
tcg_gen_shri_i32(t1, t1, 24); tcg_gen_shri_i32(t1, t1, 24);
tcg_gen_or_i32(mxu_gpr[XRa - 1], t0, t1); tcg_gen_or_i32(mxu_gpr[XRa - 1], t0, t1);
tcg_temp_free(t1);
tcg_temp_free(t0);
} }
break; break;
case MXU_OPTN3_PTN2: case MXU_OPTN3_PTN2:
@ -1410,9 +1366,6 @@ static void gen_mxu_S32ALNI(DisasContext *ctx)
tcg_gen_shri_i32(t1, t1, 16); tcg_gen_shri_i32(t1, t1, 16);
tcg_gen_or_i32(mxu_gpr[XRa - 1], t0, t1); tcg_gen_or_i32(mxu_gpr[XRa - 1], t0, t1);
tcg_temp_free(t1);
tcg_temp_free(t0);
} }
break; break;
case MXU_OPTN3_PTN3: case MXU_OPTN3_PTN3:
@ -1436,9 +1389,6 @@ static void gen_mxu_S32ALNI(DisasContext *ctx)
tcg_gen_shri_i32(t1, t1, 8); tcg_gen_shri_i32(t1, t1, 8);
tcg_gen_or_i32(mxu_gpr[XRa - 1], t0, t1); tcg_gen_or_i32(mxu_gpr[XRa - 1], t0, t1);
tcg_temp_free(t1);
tcg_temp_free(t0);
} }
break; break;
case MXU_OPTN3_PTN4: case MXU_OPTN3_PTN4:
@ -1598,7 +1548,6 @@ bool decode_ase_mxu(DisasContext *ctx, uint32_t insn)
} }
gen_set_label(l_exit); gen_set_label(l_exit);
tcg_temp_free(t_mxu_cr);
} }
return true; return true;