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M68k pull request 20220927 

Align bootinfo tags
 fix move from sr
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Merge tag 'm68k-for-7.2-pull-request' of https://github.com/vivier/qemu-m68k into staging

M68k pull request 20220927

Align bootinfo tags
fix move from sr

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# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* tag 'm68k-for-7.2-pull-request' of https://github.com/vivier/qemu-m68k:
  m68k: align bootinfo strings and data to 4 bytes
  target/m68k: use M68K_FEATURE_MOVEFROMSR_PRIV feature for move_from_sr privilege check
  target/m68k: increase size of m68k CPU features from uint32_t to uint64_t

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi 2022-09-27 11:07:52 -04:00
parent fe65642bba 2cfa963126
commit 5c3c21ebd9
4 changed files with 19 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
hw/m68k/bootinfo.h
View File

@ -48,13 +48,14 @@
stw_phys(as, base, id); \
base += 2; \
stw_phys(as, base, \
(sizeof(struct bi_record) + strlen(string) + 2) & ~1); \
(sizeof(struct bi_record) + strlen(string) + \
1 /* null termination */ + 3 /* padding */) & ~3); \
base += 2; \
for (i = 0; string[i]; i++) { \
stb_phys(as, base++, string[i]); \
} \
stb_phys(as, base++, 0); \
base = (base + 1) & ~1; \
base = (base + 3) & ~3; \
} while (0)
#define BOOTINFODATA(as, base, id, data, len) \
@ -63,13 +64,14 @@
stw_phys(as, base, id); \
base += 2; \
stw_phys(as, base, \
(sizeof(struct bi_record) + len + 3) & ~1); \
(sizeof(struct bi_record) + len + \
2 /* length field */ + 3 /* padding */) & ~3); \
base += 2; \
stw_phys(as, base, len); \
base += 2; \
for (i = 0; i < len; ++i) { \
stb_phys(as, base++, data[i]); \
} \
base = (base + 1) & ~1; \
base = (base + 3) & ~3; \
} while (0)
#endif

9
target/m68k/cpu.c
View File

@ -38,12 +38,12 @@ static bool m68k_cpu_has_work(CPUState *cs)
static void m68k_set_feature(CPUM68KState *env, int feature)
{
env->features |= (1u << feature);
env->features |= BIT_ULL(feature);
}
static void m68k_unset_feature(CPUM68KState *env, int feature)
{
env->features &= (-1u - (1u << feature));
env->features &= ~BIT_ULL(feature);
}
static void m68k_cpu_reset(DeviceState *dev)
@ -102,6 +102,7 @@ static void m5206_cpu_initfn(Object *obj)
CPUM68KState *env = &cpu->env;
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
}
/* Base feature set, including isns. for m68k family */
@ -129,6 +130,7 @@ static void m68010_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_RTD);
m68k_set_feature(env, M68K_FEATURE_BKPT);
m68k_set_feature(env, M68K_FEATURE_MOVEC);
m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
}
/*
@ -241,6 +243,7 @@ static void m5208_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_BRAL);
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
m68k_set_feature(env, M68K_FEATURE_USP);
m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
}
static void cfv4e_cpu_initfn(Object *obj)
@ -254,6 +257,7 @@ static void cfv4e_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_CF_FPU);
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
m68k_set_feature(env, M68K_FEATURE_USP);
m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
}
static void any_cpu_initfn(Object *obj)
@ -275,6 +279,7 @@ static void any_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_USP);
m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
}
static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)

8
target/m68k/cpu.h
View File

@ -154,7 +154,7 @@ typedef struct CPUArchState {
struct {} end_reset_fields;
/* Fields from here on are preserved across CPU reset. */
uint32_t features;
uint64_t features;
} CPUM68KState;
/*
@ -537,11 +537,13 @@ enum m68k_features {
M68K_FEATURE_UNALIGNED_DATA,
/* TRAPcc insn. (680[2346]0, and CPU32) */
M68K_FEATURE_TRAPCC,
/* MOVE from SR privileged (from 68010) */
M68K_FEATURE_MOVEFROMSR_PRIV,
};
static inline int m68k_feature(CPUM68KState *env, int feature)
static inline bool m68k_feature(CPUM68KState *env, int feature)
{
return (env->features & (1u << feature)) != 0;
return (env->features & BIT_ULL(feature)) != 0;
}
void m68k_cpu_list(void);

2
target/m68k/translate.c
View File

@ -4624,7 +4624,7 @@ DISAS_INSN(move_from_sr)
{
TCGv sr;
if (IS_USER(s) && !m68k_feature(env, M68K_FEATURE_M68K)) {
if (IS_USER(s) && m68k_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV)) {
gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE);
return;
}