Use qemu_ram_alloc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5630 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1
parent
053304480a
commit
5c6602c546
38
hw/sun4m.c
38
hw/sun4m.c
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@ -433,7 +433,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
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qemu_irq *esp_reset, *le_reset;
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qemu_irq *fdc_tc;
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qemu_irq *cpu_halt;
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unsigned long prom_offset, kernel_size;
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ram_addr_t ram_offset, prom_offset, tcx_offset, idreg_offset;
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unsigned long kernel_size;
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int ret;
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char buf[1024];
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BlockDriverState *fd[MAX_FD];
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@ -474,10 +475,11 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
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(unsigned int)(hwdef->max_mem / (1024 * 1024)));
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exit(1);
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}
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cpu_register_physical_memory(0, RAM_size, 0);
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ram_offset = qemu_ram_alloc(RAM_size);
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cpu_register_physical_memory(0, RAM_size, ram_offset);
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/* load boot prom */
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prom_offset = RAM_size + hwdef->vram_size;
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prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
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cpu_register_physical_memory(hwdef->slavio_base,
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(PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) &
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TARGET_PAGE_MASK,
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@ -494,7 +496,6 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
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buf);
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exit(1);
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}
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prom_offset += (ret + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
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/* set up devices */
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slavio_intctl = slavio_intctl_init(hwdef->intctl_base,
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@ -507,8 +508,9 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
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if (hwdef->idreg_base != (target_phys_addr_t)-1) {
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static const uint8_t idreg_data[] = { 0xfe, 0x81, 0x01, 0x03 };
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idreg_offset = qemu_ram_alloc(sizeof(idreg_data));
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cpu_register_physical_memory(hwdef->idreg_base, sizeof(idreg_data),
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prom_offset | IO_MEM_ROM);
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idreg_offset | IO_MEM_ROM);
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cpu_physical_memory_write_rom(hwdef->idreg_base, idreg_data,
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sizeof(idreg_data));
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}
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@ -527,7 +529,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
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fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
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exit (1);
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}
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tcx_init(ds, hwdef->tcx_base, phys_ram_base + RAM_size, RAM_size,
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tcx_offset = qemu_ram_alloc(hwdef->vram_size);
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tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
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hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
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if (nd_table[0].model == NULL
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@ -1260,7 +1263,8 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
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qemu_irq *cpu_irqs[MAX_CPUS], *sbi_irq, *sbi_cpu_irq,
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*espdma_irq, *ledma_irq;
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qemu_irq *esp_reset, *le_reset;
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unsigned long prom_offset, kernel_size;
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ram_addr_t ram_offset, prom_offset, tcx_offset;
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unsigned long kernel_size;
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int ret;
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char buf[1024];
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int drive_index;
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@ -1299,10 +1303,11 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
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(unsigned int)(hwdef->max_mem / (1024 * 1024)));
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exit(1);
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}
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cpu_register_physical_memory(0, RAM_size, 0);
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ram_offset = qemu_ram_alloc(RAM_size);
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cpu_register_physical_memory(0, RAM_size, ram_offset);
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/* load boot prom */
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prom_offset = RAM_size + hwdef->vram_size;
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prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
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cpu_register_physical_memory(hwdef->slavio_base,
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(PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) &
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TARGET_PAGE_MASK,
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@ -1339,7 +1344,8 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
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fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
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exit (1);
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}
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tcx_init(ds, hwdef->tcx_base, phys_ram_base + RAM_size, RAM_size,
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tcx_offset = qemu_ram_alloc(hwdef->vram_size);
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tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
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hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
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if (nd_table[0].model == NULL
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@ -1481,7 +1487,8 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
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qemu_irq *cpu_irqs, *slavio_irq, *espdma_irq, *ledma_irq;
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qemu_irq *esp_reset, *le_reset;
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qemu_irq *fdc_tc;
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unsigned long prom_offset, kernel_size;
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ram_addr_t ram_offset, prom_offset, tcx_offset;
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unsigned long kernel_size;
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int ret;
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char buf[1024];
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BlockDriverState *fd[MAX_FD];
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@ -1512,10 +1519,11 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
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(unsigned int)(hwdef->max_mem / (1024 * 1024)));
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exit(1);
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}
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cpu_register_physical_memory(0, RAM_size, 0);
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ram_offset = qemu_ram_alloc(RAM_size);
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cpu_register_physical_memory(0, RAM_size, ram_offset);
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/* load boot prom */
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prom_offset = RAM_size + hwdef->vram_size;
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prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
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cpu_register_physical_memory(hwdef->slavio_base,
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(PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) &
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TARGET_PAGE_MASK,
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@ -1532,7 +1540,6 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
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buf);
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exit(1);
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}
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prom_offset += (ret + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
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/* set up devices */
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slavio_intctl = sun4c_intctl_init(hwdef->intctl_base,
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@ -1552,7 +1559,8 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
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fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
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exit (1);
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}
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tcx_init(ds, hwdef->tcx_base, phys_ram_base + RAM_size, RAM_size,
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tcx_offset = qemu_ram_alloc(hwdef->vram_size);
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tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
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hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
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if (nd_table[0].model == NULL
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13
hw/sun4u.c
13
hw/sun4u.c
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@ -344,7 +344,8 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
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m48t59_t *nvram;
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int ret, linux_boot;
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unsigned int i;
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long prom_offset, initrd_size, kernel_size;
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ram_addr_t ram_offset, prom_offset, vga_ram_offset;
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long initrd_size, kernel_size;
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PCIBus *pci_bus;
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QEMUBH *bh;
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qemu_irq *irq;
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@ -387,9 +388,10 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
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env->npc = env->pc + 4;
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/* allocate RAM */
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cpu_register_physical_memory(0, RAM_size, 0);
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ram_offset = qemu_ram_alloc(RAM_size);
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cpu_register_physical_memory(0, RAM_size, ram_offset);
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prom_offset = RAM_size + vga_ram_size;
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prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
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cpu_register_physical_memory(hwdef->prom_addr,
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(PROM_SIZE_MAX + TARGET_PAGE_SIZE) &
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TARGET_PAGE_MASK,
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@ -451,8 +453,9 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
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}
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pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL);
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isa_mem_base = VGA_BASE;
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pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + RAM_size, RAM_size,
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vga_ram_size);
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vga_ram_offset = qemu_ram_alloc(vga_ram_size);
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pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + vga_ram_offset,
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vga_ram_offset, vga_ram_size);
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i = 0;
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if (hwdef->console_serial_base) {
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