Avoid brcond problems, use temps for cpu_src1 & cpu_src2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4771 c046a42c-6fe2-441c-8c8c-71466251a162
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blueswir1
parent
8210169a78
commit
5c6a0628b7
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@ -450,8 +450,7 @@ static inline void gen_op_add_cc(TCGv dst, TCGv src1, TCGv src2)
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{
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tcg_gen_mov_tl(cpu_cc_src, src1);
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tcg_gen_mov_tl(cpu_cc_src2, src2);
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tcg_gen_add_tl(dst, src1, src2);
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tcg_gen_mov_tl(cpu_cc_dst, dst);
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tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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gen_cc_clear_icc();
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gen_cc_NZ_icc(cpu_cc_dst);
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gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);
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@ -462,6 +461,7 @@ static inline void gen_op_add_cc(TCGv dst, TCGv src1, TCGv src2)
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gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src);
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gen_cc_V_add_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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#endif
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tcg_gen_mov_tl(dst, cpu_cc_dst);
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}
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static inline void gen_op_addx_cc(TCGv dst, TCGv src1, TCGv src2)
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@ -469,15 +469,14 @@ static inline void gen_op_addx_cc(TCGv dst, TCGv src1, TCGv src2)
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tcg_gen_mov_tl(cpu_cc_src, src1);
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tcg_gen_mov_tl(cpu_cc_src2, src2);
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gen_mov_reg_C(cpu_tmp0, cpu_psr);
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tcg_gen_add_tl(dst, src1, cpu_tmp0);
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tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_tmp0);
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gen_cc_clear_icc();
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gen_cc_C_add_icc(dst, cpu_cc_src);
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gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);
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#ifdef TARGET_SPARC64
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gen_cc_clear_xcc();
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gen_cc_C_add_xcc(dst, cpu_cc_src);
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gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src);
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#endif
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tcg_gen_add_tl(dst, dst, cpu_cc_src2);
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tcg_gen_mov_tl(cpu_cc_dst, dst);
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tcg_gen_add_tl(cpu_cc_dst, cpu_cc_dst, cpu_cc_src2);
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gen_cc_NZ_icc(cpu_cc_dst);
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gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);
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gen_cc_V_add_icc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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@ -486,14 +485,14 @@ static inline void gen_op_addx_cc(TCGv dst, TCGv src1, TCGv src2)
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gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src);
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gen_cc_V_add_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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#endif
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tcg_gen_mov_tl(dst, cpu_cc_dst);
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}
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static inline void gen_op_tadd_cc(TCGv dst, TCGv src1, TCGv src2)
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{
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tcg_gen_mov_tl(cpu_cc_src, src1);
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tcg_gen_mov_tl(cpu_cc_src2, src2);
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tcg_gen_add_tl(dst, src1, src2);
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tcg_gen_mov_tl(cpu_cc_dst, dst);
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tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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gen_cc_clear_icc();
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gen_cc_NZ_icc(cpu_cc_dst);
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gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);
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@ -505,6 +504,7 @@ static inline void gen_op_tadd_cc(TCGv dst, TCGv src1, TCGv src2)
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gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src);
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gen_cc_V_add_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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#endif
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tcg_gen_mov_tl(dst, cpu_cc_dst);
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}
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static inline void gen_op_tadd_ccTV(TCGv dst, TCGv src1, TCGv src2)
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@ -512,9 +512,8 @@ static inline void gen_op_tadd_ccTV(TCGv dst, TCGv src1, TCGv src2)
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tcg_gen_mov_tl(cpu_cc_src, src1);
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tcg_gen_mov_tl(cpu_cc_src2, src2);
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gen_tag_tv(cpu_cc_src, cpu_cc_src2);
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tcg_gen_add_tl(dst, src1, src2);
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tcg_gen_mov_tl(cpu_cc_dst, dst);
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gen_add_tv(dst, cpu_cc_src, cpu_cc_src2);
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tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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gen_add_tv(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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gen_cc_clear_icc();
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gen_cc_NZ_icc(cpu_cc_dst);
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gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);
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@ -524,6 +523,7 @@ static inline void gen_op_tadd_ccTV(TCGv dst, TCGv src1, TCGv src2)
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gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src);
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gen_cc_V_add_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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#endif
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tcg_gen_mov_tl(dst, cpu_cc_dst);
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}
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/* old op:
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@ -619,8 +619,7 @@ static inline void gen_op_sub_cc(TCGv dst, TCGv src1, TCGv src2)
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{
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tcg_gen_mov_tl(cpu_cc_src, src1);
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tcg_gen_mov_tl(cpu_cc_src2, src2);
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tcg_gen_sub_tl(dst, src1, src2);
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tcg_gen_mov_tl(cpu_cc_dst, dst);
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tcg_gen_sub_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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gen_cc_clear_icc();
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gen_cc_NZ_icc(cpu_cc_dst);
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gen_cc_C_sub_icc(cpu_cc_src, cpu_cc_src2);
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@ -631,6 +630,7 @@ static inline void gen_op_sub_cc(TCGv dst, TCGv src1, TCGv src2)
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gen_cc_C_sub_xcc(cpu_cc_src, cpu_cc_src2);
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gen_cc_V_sub_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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#endif
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tcg_gen_mov_tl(dst, cpu_cc_dst);
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}
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static inline void gen_op_subx_cc(TCGv dst, TCGv src1, TCGv src2)
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@ -638,15 +638,14 @@ static inline void gen_op_subx_cc(TCGv dst, TCGv src1, TCGv src2)
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tcg_gen_mov_tl(cpu_cc_src, src1);
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tcg_gen_mov_tl(cpu_cc_src2, src2);
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gen_mov_reg_C(cpu_tmp0, cpu_psr);
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tcg_gen_sub_tl(dst, src1, cpu_tmp0);
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tcg_gen_sub_tl(cpu_cc_dst, cpu_cc_src, cpu_tmp0);
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gen_cc_clear_icc();
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gen_cc_C_sub_icc(dst, cpu_cc_src);
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gen_cc_C_sub_icc(cpu_cc_dst, cpu_cc_src);
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#ifdef TARGET_SPARC64
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gen_cc_clear_xcc();
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gen_cc_C_sub_xcc(dst, cpu_cc_src);
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gen_cc_C_sub_xcc(cpu_cc_dst, cpu_cc_src);
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#endif
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tcg_gen_sub_tl(dst, dst, cpu_cc_src2);
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tcg_gen_mov_tl(cpu_cc_dst, dst);
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tcg_gen_sub_tl(cpu_cc_dst, cpu_cc_dst, cpu_cc_src2);
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gen_cc_NZ_icc(cpu_cc_dst);
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gen_cc_C_sub_icc(cpu_cc_dst, cpu_cc_src);
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gen_cc_V_sub_icc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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@ -655,14 +654,14 @@ static inline void gen_op_subx_cc(TCGv dst, TCGv src1, TCGv src2)
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gen_cc_C_sub_xcc(cpu_cc_dst, cpu_cc_src);
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gen_cc_V_sub_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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#endif
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tcg_gen_mov_tl(dst, cpu_cc_dst);
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}
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static inline void gen_op_tsub_cc(TCGv dst, TCGv src1, TCGv src2)
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{
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tcg_gen_mov_tl(cpu_cc_src, src1);
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tcg_gen_mov_tl(cpu_cc_src2, src2);
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tcg_gen_sub_tl(dst, src1, src2);
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tcg_gen_mov_tl(cpu_cc_dst, dst);
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tcg_gen_sub_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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gen_cc_clear_icc();
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gen_cc_NZ_icc(cpu_cc_dst);
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gen_cc_C_sub_icc(cpu_cc_src, cpu_cc_src2);
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@ -674,6 +673,7 @@ static inline void gen_op_tsub_cc(TCGv dst, TCGv src1, TCGv src2)
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gen_cc_C_sub_xcc(cpu_cc_src, cpu_cc_src2);
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gen_cc_V_sub_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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#endif
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tcg_gen_mov_tl(dst, cpu_cc_dst);
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}
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static inline void gen_op_tsub_ccTV(TCGv dst, TCGv src1, TCGv src2)
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@ -681,9 +681,8 @@ static inline void gen_op_tsub_ccTV(TCGv dst, TCGv src1, TCGv src2)
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tcg_gen_mov_tl(cpu_cc_src, src1);
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tcg_gen_mov_tl(cpu_cc_src2, src2);
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gen_tag_tv(cpu_cc_src, cpu_cc_src2);
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tcg_gen_sub_tl(dst, src1, src2);
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tcg_gen_mov_tl(cpu_cc_dst, dst);
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gen_sub_tv(dst, cpu_cc_src, cpu_cc_src2);
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tcg_gen_sub_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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gen_sub_tv(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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gen_cc_clear_icc();
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gen_cc_NZ_icc(cpu_cc_dst);
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gen_cc_C_sub_icc(cpu_cc_src, cpu_cc_src2);
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@ -693,6 +692,7 @@ static inline void gen_op_tsub_ccTV(TCGv dst, TCGv src1, TCGv src2)
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gen_cc_C_sub_xcc(cpu_cc_src, cpu_cc_src2);
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gen_cc_V_sub_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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#endif
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tcg_gen_mov_tl(dst, cpu_cc_dst);
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}
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static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2)
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@ -741,13 +741,13 @@ static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2)
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tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, cpu_tmp0);
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/* do addition and update flags */
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tcg_gen_add_tl(dst, cpu_cc_src, cpu_cc_src2);
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tcg_gen_mov_tl(cpu_cc_dst, dst);
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tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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gen_cc_clear_icc();
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gen_cc_NZ_icc(cpu_cc_dst);
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gen_cc_V_add_icc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
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gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);
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tcg_gen_mov_tl(dst, cpu_cc_dst);
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}
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static inline void gen_op_umul(TCGv dst, TCGv src1, TCGv src2)
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@ -818,7 +818,7 @@ static inline void gen_op_sdivx(TCGv dst, TCGv src1, TCGv src2)
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l2 = gen_new_label();
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tcg_gen_mov_tl(cpu_cc_src, src1);
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tcg_gen_mov_tl(cpu_cc_src2, src2);
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gen_trap_ifdivzero_tl(src2);
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gen_trap_ifdivzero_tl(cpu_cc_src2);
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tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src, INT64_MIN, l1);
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tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src2, -1, l1);
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tcg_gen_movi_i64(dst, INT64_MIN);
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@ -837,8 +837,7 @@ static inline void gen_op_div_cc(TCGv dst)
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gen_cc_clear_icc();
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gen_cc_NZ_icc(cpu_cc_dst);
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l1 = gen_new_label();
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tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, cc_src2));
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tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
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tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_cc_src2, 0, l1);
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tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);
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gen_set_label(l1);
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}
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@ -1866,11 +1865,9 @@ static inline TCGv get_src1(unsigned int insn, TCGv def)
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rs1 = GET_FIELD(insn, 13, 17);
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if (rs1 == 0)
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//r_rs1 = tcg_const_tl(0);
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tcg_gen_movi_tl(def, 0);
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r_rs1 = tcg_const_tl(0); // XXX how to free?
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else if (rs1 < 8)
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//r_rs1 = cpu_gregs[rs1];
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tcg_gen_mov_tl(def, cpu_gregs[rs1]);
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r_rs1 = cpu_gregs[rs1];
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else
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tcg_gen_ld_tl(def, cpu_regwptr, (rs1 - 8) * sizeof(target_ulong));
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return r_rs1;
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@ -1916,8 +1913,8 @@ static void disas_sparc_insn(DisasContext * dc)
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rd = GET_FIELD(insn, 2, 6);
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cpu_dst = cpu_T[0];
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cpu_src1 = cpu_T[0]; // const
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cpu_src2 = cpu_T[1]; // const
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cpu_src1 = tcg_temp_new(TCG_TYPE_TL); // const
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cpu_src2 = tcg_temp_new(TCG_TYPE_TL); // const
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// loads and stores
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cpu_addr = cpu_T[0];
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