From 5cf2d9042881bb3e352391f2865ae461a415798f Mon Sep 17 00:00:00 2001 From: Denis Drakhnya Date: Tue, 24 Nov 2020 00:02:11 +0200 Subject: [PATCH] target: e2k: Add %idr. --- target/e2k/cpu.c | 1 + target/e2k/cpu.h | 22 ++++++++++++++++++++++ target/e2k/helper.c | 2 ++ 3 files changed, 25 insertions(+) diff --git a/target/e2k/cpu.c b/target/e2k/cpu.c index 7ef83c434f..e4b61e7db0 100644 --- a/target/e2k/cpu.c +++ b/target/e2k/cpu.c @@ -56,6 +56,7 @@ static void e2k_cpu_reset(DeviceState *dev) env->boff = 8; env->bsize = 8; env->bcur = 0; + env->idr = 0x3a207; // mimic 8c } #ifdef CONFIG_SOFTMMU diff --git a/target/e2k/cpu.h b/target/e2k/cpu.h index e3b515181b..a840c0d543 100644 --- a/target/e2k/cpu.h +++ b/target/e2k/cpu.h @@ -211,6 +211,27 @@ void e2k_tcg_initialize(void); #define UPSR_IUC_OFF 10 /* ignore access right for uncached pages */ #define UPSR_IUC_BIT (1 << UPSR_IUC_OFF) +#define IDR_MDL_OFF 0 /* CPU model number */ +#define IDR_MDL_END 7 +#define IDR_MDL_LEN (IDR_MDL_END - IDR_MDL_OFF + 1) +#define IDR_REV_OFF 8 /* revision number */ +#define IDR_REV_END 11 +#define IDR_REV_LEN (IDR_REV_END - IDR_REV_OFF + 1) +#define IDR_WBL_OFF 12 /* write-back length of L2 */ +#define IDR_WBL_END 14 +#define IDR_WBL_LEN (IDR_WBL_END - IDR_WBL_OFF + 1) +#define IDR_MS_OFF 15 /* model specific info */ +#define IDR_MS_END 63 +#define IDR_MS_LEN (IDR_MS_END - IDR_MS_OFF + 1) + +/* Cache write-back length */ +#define IDR_WBL_0 0x0 /* none CPU internal cache */ +#define IDR_WBL_32 0x1 +#define IDR_WBL_64 0x2 +#define IDR_WBL_128 0x3 +#define IDR_WBL_256 0x4 +#define IDR_WBL_TO_BYTES(wbl) ((wbl) ? (1 << ((wbs) + 4)) : 1) + typedef enum { E2K_EXCP_UNIMPL = 0x01, E2K_EXCP_SYSCALL = 0x02, @@ -278,6 +299,7 @@ typedef struct CPUArchState { target_ulong nip; /* next instruction address */ uint32_t upsr; + uint64_t idr; uint32_t pfpfr; // Packed Floating Point Flag Register (PFPFR) uint32_t fpcr; // Floating point control register (FPCR) diff --git a/target/e2k/helper.c b/target/e2k/helper.c index d415840775..4c667f0f5d 100644 --- a/target/e2k/helper.c +++ b/target/e2k/helper.c @@ -291,6 +291,8 @@ uint64_t helper_state_reg_get(CPUE2KState *env, int reg) return env->ip; case 0x83: /* %lsr */ return env->lsr; + case 0x8a: /* %idr */ + return env->idr; default: /* TODO: exception */ qemu_log_mask(LOG_UNIMP, "unknown register 0x%x\n", reg);