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target/nios2: Clean up nios2_cpu_dump_state

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Do not print control registers for user-only mode.
Rename reserved control registers to "resN", where
N is the control register index.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-24-richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2022-04-21 08:16:54 -07:00
parent b8f036a9fa
commit 5dfb910d91
1 changed files with 9 additions and 10 deletions
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19
target/nios2/translate.c
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@ -783,16 +783,18 @@ static const char * const gr_regnames[NUM_GP_REGS] = {
"fp", "ea", "ba", "ra",
};
#ifndef CONFIG_USER_ONLY
static const char * const cr_regnames[NUM_CR_REGS] = {
"status", "estatus", "bstatus", "ienable",
"ipending", "cpuid", "reserved0", "exception",
"ipending", "cpuid", "res6", "exception",
"pteaddr", "tlbacc", "tlbmisc", "reserved1",
"badaddr", "config", "mpubase", "mpuacc",
"reserved2", "reserved3", "reserved4", "reserved5",
"reserved6", "reserved7", "reserved8", "reserved9",
"reserved10", "reserved11", "reserved12", "reserved13",
"reserved14", "reserved15", "reserved16", "reserved17",
"res16", "res17", "res18", "res19",
"res20", "res21", "res22", "res23",
"res24", "res25", "res26", "res27",
"res28", "res29", "res30", "res31",
};
#endif
#include "exec/gen-icount.h"
@ -905,10 +907,6 @@ void nios2_cpu_dump_state(CPUState *cs, FILE *f, int flags)
CPUNios2State *env = &cpu->env;
int i;
if (!env) {
return;
}
qemu_fprintf(f, "IN: PC=%x %s\n", env->pc, lookup_symbol(env->pc));
for (i = 0; i < NUM_GP_REGS; i++) {
@ -917,13 +915,14 @@ void nios2_cpu_dump_state(CPUState *cs, FILE *f, int flags)
qemu_fprintf(f, "\n");
}
}
#if !defined(CONFIG_USER_ONLY)
for (i = 0; i < NUM_CR_REGS; i++) {
qemu_fprintf(f, "%9s=%8.8x ", cr_regnames[i], env->ctrl[i]);
if ((i + 1) % 4 == 0) {
qemu_fprintf(f, "\n");
}
}
#if !defined(CONFIG_USER_ONLY)
qemu_fprintf(f, " mmu write: VPN=%05X PID %02X TLBACC %08X\n",
env->mmu.pteaddr_wr & CR_PTEADDR_VPN_MASK,
(env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4,