hw/misc/imx6_src: Don't crash trying to reset missing CPUs
Commit4881658a4b
introduced a call to arm_get_cpu_by_id(), and Coverity noticed that we weren't checking that it didn't return NULL (CID 1371652). Normally this won't happen (because all 4 CPUs are expected to exist), but it's possible the user requested fewer CPUs on the command line. Handle this possibility by silently doing nothing, which is the same behaviour as before commit4881658a4b
and also how we handle the other CPU operations (since we ignore the INVALID_PARAM returns from arm_set_cpu_on() and friends). There is a slight behavioural difference to the pre-4881658a4b situation: the "reset this core" bit will remain set rather than not being permitted to be set. The imx6 datasheet is unclear about the behaviour in this odd corner case, so we opt for the simpler code rather than complicated logic to maintain identical behaviour. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1488542374-1256-1-git-send-email-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
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@ -143,13 +143,17 @@ static void imx6_defer_clear_reset_bit(int cpuid,
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unsigned long reset_shift)
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{
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struct SRCSCRResetInfo *ri;
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CPUState *cpu = arm_get_cpu_by_id(cpuid);
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if (!cpu) {
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return;
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}
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ri = g_malloc(sizeof(struct SRCSCRResetInfo));
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ri->s = s;
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ri->reset_bit = reset_shift;
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async_run_on_cpu(arm_get_cpu_by_id(cpuid), imx6_clear_reset_bit,
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RUN_ON_CPU_HOST_PTR(ri));
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async_run_on_cpu(cpu, imx6_clear_reset_bit, RUN_ON_CPU_HOST_PTR(ri));
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}
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