target/s390x: fix execution with icount
This patch adds some gen_io_start() calls to allow execution of s390x targets in icount mode with -smp 1. It enables deterministic timers and record/replay features. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Hildenbrand <david@redhat.com> Message-Id: <160455551747.32240.17074484658979970129.stgit@pasha-ThinkPad-X280> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
This commit is contained in:
Pavel Dovgalyuk
Cornelia Huck
parent
5e592947de
commit
5e49e89cb6
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@ -379,7 +379,7 @@
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/* EXTRACT CPU ATTRIBUTE */
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C(0xeb4c, ECAG, RSY_a, GIE, 0, a2, r1, 0, ecag, 0)
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/* EXTRACT CPU TIME */
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C(0xc801, ECTG, SSF, ECT, 0, 0, 0, 0, ectg, 0)
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F(0xc801, ECTG, SSF, ECT, 0, 0, 0, 0, ectg, 0, IF_IO)
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/* EXTRACT FPC */
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F(0xb38c, EFPC, RRE, Z, 0, 0, new, r1_32, efpc, 0, IF_BFP)
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/* EXTRACT PSW */
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@ -855,10 +855,10 @@
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C(0xe32f, STRVG, RXY_a, Z, la2, r1_o, new, m1_64, rev64, 0)
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/* STORE CLOCK */
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C(0xb205, STCK, S, Z, la2, 0, new, m1_64, stck, 0)
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C(0xb27c, STCKF, S, SCF, la2, 0, new, m1_64, stck, 0)
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F(0xb205, STCK, S, Z, la2, 0, new, m1_64, stck, 0, IF_IO)
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F(0xb27c, STCKF, S, SCF, la2, 0, new, m1_64, stck, 0, IF_IO)
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/* STORE CLOCK EXTENDED */
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C(0xb278, STCKE, S, Z, 0, a2, 0, 0, stcke, 0)
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F(0xb278, STCKE, S, Z, 0, a2, 0, 0, stcke, 0, IF_IO)
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/* STORE FACILITY LIST EXTENDED */
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C(0xb2b0, STFLE, S, SFLE, 0, a2, 0, 0, stfle, 0)
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@ -1269,7 +1269,7 @@
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E(0xb250, CSP, RRE, Z, r1_32u, ra2, r1_P, 0, csp, 0, MO_TEUL, IF_PRIV)
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E(0xb98a, CSPG, RRE, DAT_ENH, r1_o, ra2, r1_P, 0, csp, 0, MO_TEQ, IF_PRIV)
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/* DIAGNOSE (KVM hypercall) */
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F(0x8300, DIAG, RSI, Z, 0, 0, 0, 0, diag, 0, IF_PRIV)
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F(0x8300, DIAG, RSI, Z, 0, 0, 0, 0, diag, 0, IF_PRIV | IF_IO)
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/* INSERT STORAGE KEY EXTENDED */
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F(0xb229, ISKE, RRE, Z, 0, r2_o, new, r1_8, iske, 0, IF_PRIV)
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/* INVALIDATE DAT TABLE ENTRY */
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@ -1301,17 +1301,17 @@
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/* RESET REFERENCE BIT EXTENDED */
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F(0xb22a, RRBE, RRE, Z, 0, r2_o, 0, 0, rrbe, 0, IF_PRIV)
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/* SERVICE CALL LOGICAL PROCESSOR (PV hypercall) */
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F(0xb220, SERVC, RRE, Z, r1_o, r2_o, 0, 0, servc, 0, IF_PRIV)
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F(0xb220, SERVC, RRE, Z, r1_o, r2_o, 0, 0, servc, 0, IF_PRIV | IF_IO)
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/* SET ADDRESS SPACE CONTROL FAST */
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F(0xb279, SACF, S, Z, 0, a2, 0, 0, sacf, 0, IF_PRIV)
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/* SET CLOCK */
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F(0xb204, SCK, S, Z, la2, 0, 0, 0, sck, 0, IF_PRIV)
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F(0xb204, SCK, S, Z, la2, 0, 0, 0, sck, 0, IF_PRIV | IF_IO)
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/* SET CLOCK COMPARATOR */
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F(0xb206, SCKC, S, Z, 0, m2_64a, 0, 0, sckc, 0, IF_PRIV)
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F(0xb206, SCKC, S, Z, 0, m2_64a, 0, 0, sckc, 0, IF_PRIV | IF_IO)
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/* SET CLOCK PROGRAMMABLE FIELD */
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F(0x0107, SCKPF, E, Z, 0, 0, 0, 0, sckpf, 0, IF_PRIV)
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/* SET CPU TIMER */
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F(0xb208, SPT, S, Z, 0, m2_64a, 0, 0, spt, 0, IF_PRIV)
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F(0xb208, SPT, S, Z, 0, m2_64a, 0, 0, spt, 0, IF_PRIV | IF_IO)
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/* SET PREFIX */
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F(0xb210, SPX, S, Z, 0, m2_32ua, 0, 0, spx, 0, IF_PRIV)
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/* SET PSW KEY FROM ADDRESS */
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@ -1321,7 +1321,7 @@
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/* SET SYSTEM MASK */
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F(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0, IF_PRIV)
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/* SIGNAL PROCESSOR */
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F(0xae00, SIGP, RS_a, Z, 0, a2, 0, 0, sigp, 0, IF_PRIV)
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F(0xae00, SIGP, RS_a, Z, 0, a2, 0, 0, sigp, 0, IF_PRIV | IF_IO)
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/* STORE CLOCK COMPARATOR */
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F(0xb207, STCKC, S, Z, la2, 0, new, m1_64a, stckc, 0, IF_PRIV)
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/* STORE CONTROL */
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@ -1332,7 +1332,7 @@
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/* STORE CPU ID */
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F(0xb202, STIDP, S, Z, la2, 0, new, m1_64a, stidp, 0, IF_PRIV)
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/* STORE CPU TIMER */
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F(0xb209, STPT, S, Z, la2, 0, new, m1_64a, stpt, 0, IF_PRIV)
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F(0xb209, STPT, S, Z, la2, 0, new, m1_64a, stpt, 0, IF_PRIV | IF_IO)
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/* STORE FACILITY LIST */
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F(0xb2b1, STFL, S, Z, 0, 0, 0, 0, stfl, 0, IF_PRIV)
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/* STORE PREFIX */
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@ -1352,35 +1352,35 @@
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C(0xe501, TPROT, SSE, Z, la1, a2, 0, 0, tprot, 0)
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/* CCW I/O Instructions */
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F(0xb276, XSCH, S, Z, 0, 0, 0, 0, xsch, 0, IF_PRIV)
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F(0xb230, CSCH, S, Z, 0, 0, 0, 0, csch, 0, IF_PRIV)
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F(0xb231, HSCH, S, Z, 0, 0, 0, 0, hsch, 0, IF_PRIV)
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F(0xb232, MSCH, S, Z, 0, insn, 0, 0, msch, 0, IF_PRIV)
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F(0xb23b, RCHP, S, Z, 0, 0, 0, 0, rchp, 0, IF_PRIV)
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F(0xb238, RSCH, S, Z, 0, 0, 0, 0, rsch, 0, IF_PRIV)
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F(0xb237, SAL, S, Z, 0, 0, 0, 0, sal, 0, IF_PRIV)
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F(0xb23c, SCHM, S, Z, 0, insn, 0, 0, schm, 0, IF_PRIV)
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F(0xb274, SIGA, S, Z, 0, 0, 0, 0, siga, 0, IF_PRIV)
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F(0xb23a, STCPS, S, Z, 0, 0, 0, 0, stcps, 0, IF_PRIV)
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F(0xb233, SSCH, S, Z, 0, insn, 0, 0, ssch, 0, IF_PRIV)
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F(0xb239, STCRW, S, Z, 0, insn, 0, 0, stcrw, 0, IF_PRIV)
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F(0xb234, STSCH, S, Z, 0, insn, 0, 0, stsch, 0, IF_PRIV)
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F(0xb236, TPI , S, Z, la2, 0, 0, 0, tpi, 0, IF_PRIV)
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F(0xb235, TSCH, S, Z, 0, insn, 0, 0, tsch, 0, IF_PRIV)
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F(0xb276, XSCH, S, Z, 0, 0, 0, 0, xsch, 0, IF_PRIV | IF_IO)
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F(0xb230, CSCH, S, Z, 0, 0, 0, 0, csch, 0, IF_PRIV | IF_IO)
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F(0xb231, HSCH, S, Z, 0, 0, 0, 0, hsch, 0, IF_PRIV | IF_IO)
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F(0xb232, MSCH, S, Z, 0, insn, 0, 0, msch, 0, IF_PRIV | IF_IO)
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F(0xb23b, RCHP, S, Z, 0, 0, 0, 0, rchp, 0, IF_PRIV | IF_IO)
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F(0xb238, RSCH, S, Z, 0, 0, 0, 0, rsch, 0, IF_PRIV | IF_IO)
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F(0xb237, SAL, S, Z, 0, 0, 0, 0, sal, 0, IF_PRIV | IF_IO)
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F(0xb23c, SCHM, S, Z, 0, insn, 0, 0, schm, 0, IF_PRIV | IF_IO)
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F(0xb274, SIGA, S, Z, 0, 0, 0, 0, siga, 0, IF_PRIV | IF_IO)
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F(0xb23a, STCPS, S, Z, 0, 0, 0, 0, stcps, 0, IF_PRIV | IF_IO)
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F(0xb233, SSCH, S, Z, 0, insn, 0, 0, ssch, 0, IF_PRIV | IF_IO)
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F(0xb239, STCRW, S, Z, 0, insn, 0, 0, stcrw, 0, IF_PRIV | IF_IO)
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F(0xb234, STSCH, S, Z, 0, insn, 0, 0, stsch, 0, IF_PRIV | IF_IO)
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F(0xb236, TPI , S, Z, la2, 0, 0, 0, tpi, 0, IF_PRIV | IF_IO)
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F(0xb235, TSCH, S, Z, 0, insn, 0, 0, tsch, 0, IF_PRIV | IF_IO)
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/* ??? Not listed in PoO ninth edition, but there's a linux driver that
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uses it: "A CHSC subchannel is usually present on LPAR only." */
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F(0xb25f, CHSC, RRE, Z, 0, insn, 0, 0, chsc, 0, IF_PRIV)
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F(0xb25f, CHSC, RRE, Z, 0, insn, 0, 0, chsc, 0, IF_PRIV | IF_IO)
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/* zPCI Instructions */
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/* None of these instructions are documented in the PoP, so this is all
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based upon target/s390x/kvm.c and Linux code and likely incomplete */
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F(0xebd0, PCISTB, RSY_a, PCI, la2, 0, 0, 0, pcistb, 0, IF_PRIV)
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F(0xebd1, SIC, RSY_a, AIS, r1, r3, 0, 0, sic, 0, IF_PRIV)
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F(0xb9a0, CLP, RRF_c, PCI, 0, 0, 0, 0, clp, 0, IF_PRIV)
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F(0xb9d0, PCISTG, RRE, PCI, 0, 0, 0, 0, pcistg, 0, IF_PRIV)
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F(0xb9d2, PCILG, RRE, PCI, 0, 0, 0, 0, pcilg, 0, IF_PRIV)
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F(0xb9d3, RPCIT, RRE, PCI, 0, 0, 0, 0, rpcit, 0, IF_PRIV)
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F(0xe3d0, MPCIFC, RXY_a, PCI, la2, 0, 0, 0, mpcifc, 0, IF_PRIV)
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F(0xe3d4, STPCIFC, RXY_a, PCI, la2, 0, 0, 0, stpcifc, 0, IF_PRIV)
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F(0xebd0, PCISTB, RSY_a, PCI, la2, 0, 0, 0, pcistb, 0, IF_PRIV | IF_IO)
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F(0xebd1, SIC, RSY_a, AIS, r1, r3, 0, 0, sic, 0, IF_PRIV | IF_IO)
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F(0xb9a0, CLP, RRF_c, PCI, 0, 0, 0, 0, clp, 0, IF_PRIV | IF_IO)
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F(0xb9d0, PCISTG, RRE, PCI, 0, 0, 0, 0, pcistg, 0, IF_PRIV | IF_IO)
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F(0xb9d2, PCILG, RRE, PCI, 0, 0, 0, 0, pcilg, 0, IF_PRIV | IF_IO)
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F(0xb9d3, RPCIT, RRE, PCI, 0, 0, 0, 0, rpcit, 0, IF_PRIV | IF_IO)
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F(0xe3d0, MPCIFC, RXY_a, PCI, la2, 0, 0, 0, mpcifc, 0, IF_PRIV | IF_IO)
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F(0xe3d4, STPCIFC, RXY_a, PCI, la2, 0, 0, 0, stpcifc, 0, IF_PRIV | IF_IO)
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#endif /* CONFIG_USER_ONLY */
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@ -1214,6 +1214,7 @@ typedef struct {
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#define IF_DFP 0x0010 /* decimal floating point instruction */
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#define IF_PRIV 0x0020 /* privileged instruction */
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#define IF_VEC 0x0040 /* vector instruction */
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#define IF_IO 0x0080 /* input/output instruction */
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struct DisasInsn {
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unsigned opc:16;
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@ -6369,6 +6370,7 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s)
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const DisasInsn *insn;
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DisasJumpType ret = DISAS_NEXT;
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DisasOps o = {};
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bool icount = false;
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/* Search for the insn in the table. */
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insn = extract_insn(env, s);
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@ -6435,6 +6437,14 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s)
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return DISAS_NORETURN;
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}
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}
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/* input/output is the special case for icount mode */
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if (unlikely(insn->flags & IF_IO)) {
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icount = tb_cflags(s->base.tb) & CF_USE_ICOUNT;
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if (icount) {
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gen_io_start();
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}
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}
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}
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/* Check for insn specification exceptions. */
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@ -6488,6 +6498,11 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s)
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tcg_temp_free_i64(o.addr1);
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}
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/* io should be the last instruction in tb when icount is enabled */
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if (unlikely(icount && ret == DISAS_NEXT)) {
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ret = DISAS_PC_STALE;
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}
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#ifndef CONFIG_USER_ONLY
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if (s->base.tb->flags & FLAG_MASK_PER) {
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/* An exception might be triggered, save PSW if not already done. */
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