tcg/mips: Remove TARGET_LONG_BITS, TCG_TYPE_TL
All uses replaced with TCGContext.addr_type. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -354,10 +354,6 @@ typedef enum {
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/* Aliases for convenience. */
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ALIAS_PADD = sizeof(void *) == 4 ? OPC_ADDU : OPC_DADDU,
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ALIAS_PADDI = sizeof(void *) == 4 ? OPC_ADDIU : OPC_DADDIU,
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ALIAS_TSRL = TARGET_LONG_BITS == 32 || TCG_TARGET_REG_BITS == 32
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? OPC_SRL : OPC_DSRL,
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ALIAS_TADDI = TARGET_LONG_BITS == 32 || TCG_TARGET_REG_BITS == 32
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? OPC_ADDIU : OPC_DADDIU,
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} MIPSInsn;
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/*
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@ -1156,6 +1152,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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TCGReg addrlo, TCGReg addrhi,
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MemOpIdx oi, bool is_ld)
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{
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TCGType addr_type = s->addr_type;
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TCGLabelQemuLdst *ldst = NULL;
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MemOp opc = get_memop(oi);
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MemOp a_bits;
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@ -1190,23 +1187,26 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP1, TCG_AREG0, table_off);
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/* Extract the TLB index from the address into TMP3. */
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tcg_out_opc_sa(s, ALIAS_TSRL, TCG_TMP3, addrlo,
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TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
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if (TCG_TARGET_REG_BITS == 32 || addr_type == TCG_TYPE_I32) {
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tcg_out_opc_sa(s, OPC_SRL, TCG_TMP3, addrlo,
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TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
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} else {
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tcg_out_dsrl(s, TCG_TMP3, addrlo,
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TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
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}
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tcg_out_opc_reg(s, OPC_AND, TCG_TMP3, TCG_TMP3, TCG_TMP0);
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/* Add the tlb_table pointer, creating the CPUTLBEntry address in TMP3. */
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tcg_out_opc_reg(s, ALIAS_PADD, TCG_TMP3, TCG_TMP3, TCG_TMP1);
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/* Load the (low-half) tlb comparator. */
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if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
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tcg_out_ldst(s, OPC_LW, TCG_TMP0, TCG_TMP3, cmp_off + LO_OFF);
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} else {
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tcg_out_ld(s, TCG_TYPE_TL, TCG_TMP0, TCG_TMP3, cmp_off);
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}
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if (TCG_TARGET_REG_BITS >= TARGET_LONG_BITS) {
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if (TCG_TARGET_REG_BITS == 64 || addr_type == TCG_TYPE_I32) {
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/* Load the tlb comparator. */
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tcg_out_ld(s, addr_type, TCG_TMP0, TCG_TMP3, cmp_off);
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/* Load the tlb addend for the fast path. */
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP3, TCG_TMP3, add_off);
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} else {
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/* Load the low half of the tlb comparator. */
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tcg_out_ldst(s, OPC_LW, TCG_TMP0, TCG_TMP3, cmp_off + LO_OFF);
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}
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/*
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@ -1214,16 +1214,20 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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* For unaligned accesses, compare against the end of the access to
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* verify that it does not cross a page boundary.
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*/
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tcg_out_movi(s, TCG_TYPE_TL, TCG_TMP1, TARGET_PAGE_MASK | a_mask);
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tcg_out_movi(s, addr_type, TCG_TMP1, TARGET_PAGE_MASK | a_mask);
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if (a_mask < s_mask) {
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tcg_out_opc_imm(s, ALIAS_TADDI, TCG_TMP2, addrlo, s_mask - a_mask);
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if (TCG_TARGET_REG_BITS == 32 || addr_type == TCG_TYPE_I32) {
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tcg_out_opc_imm(s, OPC_ADDIU, TCG_TMP2, addrlo, s_mask - a_mask);
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} else {
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tcg_out_opc_imm(s, OPC_DADDIU, TCG_TMP2, addrlo, s_mask - a_mask);
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}
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tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, TCG_TMP2);
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} else {
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tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrlo);
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}
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/* Zero extend a 32-bit guest address for a 64-bit host. */
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if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
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if (TCG_TARGET_REG_BITS == 64 && addr_type == TCG_TYPE_I32) {
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tcg_out_ext32u(s, TCG_TMP2, addrlo);
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addrlo = TCG_TMP2;
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}
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@ -1232,7 +1236,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0);
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/* Load and test the high half tlb comparator. */
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if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
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if (TCG_TARGET_REG_BITS == 32 && addr_type != TCG_TYPE_I32) {
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/* delay slot */
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tcg_out_ldst(s, OPC_LW, TCG_TMP0, TCG_TMP3, cmp_off + HI_OFF);
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@ -1269,7 +1273,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
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}
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base = addrlo;
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if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
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if (TCG_TARGET_REG_BITS == 64 && addr_type == TCG_TYPE_I32) {
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tcg_out_ext32u(s, TCG_REG_A0, base);
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base = TCG_REG_A0;
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}
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