hw/xen: Support MSI mapping to PIRQ
The way that Xen handles MSI PIRQs is kind of awful.
There is a special MSI message which targets a PIRQ. The vector in the
low bits of data must be zero. The low 8 bits of the PIRQ# are in the
destination ID field, the extended destination ID field is unused, and
instead the high bits of the PIRQ# are in the high 32 bits of the address.
Using the high bits of the address means that we can't intercept and
translate these messages in kvm_send_msi(), because they won't be caught
by the APIC — addresses like 0x1000fee46000 aren't in the APIC's range.
So we catch them in pci_msi_trigger() instead, and deliver the event
channel directly.
That isn't even the worst part. The worst part is that Xen snoops on
writes to devices' MSI vectors while they are *masked*. When a MSI
message is written which looks like it targets a PIRQ, it remembers
the device and vector for later.
When the guest makes a hypercall to bind that PIRQ# (snooped from a
marked MSI vector) to an event channel port, Xen *unmasks* that MSI
vector on the device. Xen guests using PIRQ delivery of MSI don't
ever actually unmask the MSI for themselves.
Now that this is working we can finally enable XENFEAT_hvm_pirqs and
let the guest use it all.
Tested with passthrough igb and emulated e1000e + AHCI.
CPU0 CPU1
0: 65 0 IO-APIC 2-edge timer
1: 0 14 xen-pirq 1-ioapic-edge i8042
4: 0 846 xen-pirq 4-ioapic-edge ttyS0
8: 1 0 xen-pirq 8-ioapic-edge rtc0
9: 0 0 xen-pirq 9-ioapic-level acpi
12: 257 0 xen-pirq 12-ioapic-edge i8042
24: 9600 0 xen-percpu -virq timer0
25: 2758 0 xen-percpu -ipi resched0
26: 0 0 xen-percpu -ipi callfunc0
27: 0 0 xen-percpu -virq debug0
28: 1526 0 xen-percpu -ipi callfuncsingle0
29: 0 0 xen-percpu -ipi spinlock0
30: 0 8608 xen-percpu -virq timer1
31: 0 874 xen-percpu -ipi resched1
32: 0 0 xen-percpu -ipi callfunc1
33: 0 0 xen-percpu -virq debug1
34: 0 1617 xen-percpu -ipi callfuncsingle1
35: 0 0 xen-percpu -ipi spinlock1
36: 8 0 xen-dyn -event xenbus
37: 0 6046 xen-pirq -msi ahci[0000:00:03.0]
38: 1 0 xen-pirq -msi-x ens4
39: 0 73 xen-pirq -msi-x ens4-rx-0
40: 14 0 xen-pirq -msi-x ens4-rx-1
41: 0 32 xen-pirq -msi-x ens4-tx-0
42: 47 0 xen-pirq -msi-x ens4-tx-1
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
This commit is contained in:
David Woodhouse
parent
4f81baa33e
commit
6096cf7877
@ -2,3 +2,4 @@ kvm_xen_map_pirq(int pirq, int gsi) "pirq %d gsi %d"
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kvm_xen_unmap_pirq(int pirq, int gsi) "pirq %d gsi %d"
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kvm_xen_get_free_pirq(int pirq, int type) "pirq %d type %d"
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kvm_xen_bind_pirq(int pirq, int port) "pirq %d port %d"
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kvm_xen_unmask_pirq(int pirq, char *dev, int vector) "pirq %d dev %s vector %d"
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@ -14,6 +14,22 @@
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#include "qapi/error.h"
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#include "qapi/qapi-commands-misc-target.h"
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#include "xen_evtchn.h"
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void xen_evtchn_snoop_msi(PCIDevice *dev, bool is_msix, unsigned int vector,
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uint64_t addr, uint32_t data, bool is_masked)
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{
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}
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void xen_evtchn_remove_pci_device(PCIDevice *dev)
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{
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}
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bool xen_evtchn_deliver_pirq_msi(uint64_t address, uint32_t data)
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{
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return false;
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}
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#ifdef TARGET_I386
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EvtchnInfoList *qmp_xen_event_list(Error **errp)
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{
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@ -31,6 +31,8 @@
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#include "hw/i386/x86.h"
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#include "hw/i386/pc.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/msix.h"
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#include "hw/irq.h"
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#include "xen_evtchn.h"
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@ -45,6 +47,9 @@
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#include "hw/xen/interface/memory.h"
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#include "hw/xen/interface/hvm/params.h"
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/* XX: For kvm_update_msi_routes_all() */
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#include "target/i386/kvm/kvm_i386.h"
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#define TYPE_XEN_EVTCHN "xen-evtchn"
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OBJECT_DECLARE_SIMPLE_TYPE(XenEvtchnState, XEN_EVTCHN)
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@ -119,6 +124,11 @@ struct xenevtchn_handle {
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struct pirq_info {
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int gsi;
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uint16_t port;
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PCIDevice *dev;
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int vector;
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bool is_msix;
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bool is_masked;
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bool is_translated;
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};
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struct XenEvtchnState {
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@ -151,7 +161,7 @@ struct XenEvtchnState {
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/* Per-GSI assertion state (serialized) */
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uint32_t pirq_gsi_set;
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/* Per-PIRQ information (rebuilt on migration) */
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/* Per-PIRQ information (rebuilt on migration, protected by BQL) */
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struct pirq_info *pirq;
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};
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@ -1007,16 +1017,23 @@ static bool virq_is_global(uint32_t virq)
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}
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}
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static int close_port(XenEvtchnState *s, evtchn_port_t port)
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static int close_port(XenEvtchnState *s, evtchn_port_t port,
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bool *flush_kvm_routes)
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{
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XenEvtchnPort *p = &s->port_table[port];
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/* Because it *might* be a PIRQ port */
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assert(qemu_mutex_iothread_locked());
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switch (p->type) {
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case EVTCHNSTAT_closed:
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return -ENOENT;
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case EVTCHNSTAT_pirq:
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s->pirq[p->type_val].port = 0;
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if (s->pirq[p->type_val].is_translated) {
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*flush_kvm_routes = true;
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}
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break;
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case EVTCHNSTAT_virq:
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@ -1065,6 +1082,7 @@ static int close_port(XenEvtchnState *s, evtchn_port_t port)
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int xen_evtchn_soft_reset(void)
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{
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XenEvtchnState *s = xen_evtchn_singleton;
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bool flush_kvm_routes;
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int i;
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if (!s) {
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@ -1073,10 +1091,16 @@ int xen_evtchn_soft_reset(void)
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assert(qemu_mutex_iothread_locked());
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QEMU_LOCK_GUARD(&s->port_lock);
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qemu_mutex_lock(&s->port_lock);
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for (i = 0; i < s->nr_ports; i++) {
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close_port(s, i);
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close_port(s, i, &flush_kvm_routes);
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}
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qemu_mutex_unlock(&s->port_lock);
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if (flush_kvm_routes) {
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kvm_update_msi_routes_all(NULL, true, 0, 0);
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}
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return 0;
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@ -1094,6 +1118,7 @@ int xen_evtchn_reset_op(struct evtchn_reset *reset)
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int xen_evtchn_close_op(struct evtchn_close *close)
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{
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XenEvtchnState *s = xen_evtchn_singleton;
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bool flush_kvm_routes = false;
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int ret;
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if (!s) {
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@ -1104,12 +1129,17 @@ int xen_evtchn_close_op(struct evtchn_close *close)
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return -EINVAL;
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}
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QEMU_IOTHREAD_LOCK_GUARD();
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qemu_mutex_lock(&s->port_lock);
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ret = close_port(s, close->port);
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ret = close_port(s, close->port, &flush_kvm_routes);
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qemu_mutex_unlock(&s->port_lock);
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if (flush_kvm_routes) {
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kvm_update_msi_routes_all(NULL, true, 0, 0);
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}
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return ret;
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}
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@ -1226,21 +1256,54 @@ int xen_evtchn_bind_pirq_op(struct evtchn_bind_pirq *pirq)
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return -EINVAL;
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}
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QEMU_LOCK_GUARD(&s->port_lock);
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QEMU_IOTHREAD_LOCK_GUARD();
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if (s->pirq[pirq->pirq].port) {
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return -EBUSY;
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}
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qemu_mutex_lock(&s->port_lock);
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ret = allocate_port(s, 0, EVTCHNSTAT_pirq, pirq->pirq,
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&pirq->port);
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if (ret) {
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qemu_mutex_unlock(&s->port_lock);
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return ret;
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}
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s->pirq[pirq->pirq].port = pirq->port;
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trace_kvm_xen_bind_pirq(pirq->pirq, pirq->port);
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qemu_mutex_unlock(&s->port_lock);
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/*
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* Need to do the unmask outside port_lock because it may call
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* back into the MSI translate function.
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*/
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if (s->pirq[pirq->pirq].gsi == IRQ_MSI_EMU) {
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if (s->pirq[pirq->pirq].is_masked) {
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PCIDevice *dev = s->pirq[pirq->pirq].dev;
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int vector = s->pirq[pirq->pirq].vector;
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char *dev_path = qdev_get_dev_path(DEVICE(dev));
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trace_kvm_xen_unmask_pirq(pirq->pirq, dev_path, vector);
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g_free(dev_path);
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if (s->pirq[pirq->pirq].is_msix) {
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msix_set_mask(dev, vector, false);
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} else {
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msi_set_mask(dev, vector, false, NULL);
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}
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} else if (s->pirq[pirq->pirq].is_translated) {
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/*
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* If KVM had attempted to translate this one before, make it try
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* again. If we unmasked, then the notifier on the MSI(-X) vector
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* will already have had the same effect.
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*/
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kvm_update_msi_routes_all(NULL, true, 0, 0);
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}
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}
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return ret;
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}
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@ -1559,6 +1622,179 @@ bool xen_evtchn_set_gsi(int gsi, int level)
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return true;
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}
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static uint32_t msi_pirq_target(uint64_t addr, uint32_t data)
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{
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/* The vector (in low 8 bits of data) must be zero */
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if (data & 0xff) {
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return 0;
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}
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uint32_t pirq = (addr & 0xff000) >> 12;
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pirq |= (addr >> 32) & 0xffffff00;
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return pirq;
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}
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static void do_remove_pci_vector(XenEvtchnState *s, PCIDevice *dev, int vector,
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int except_pirq)
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{
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uint32_t pirq;
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for (pirq = 0; pirq < s->nr_pirqs; pirq++) {
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/*
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* We could be cleverer here, but it isn't really a fast path, and
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* this trivial optimisation is enough to let us skip the big gap
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* in the middle a bit quicker (in terms of both loop iterations,
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* and cache lines).
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*/
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if (!(pirq & 63) && !(pirq_inuse_word(s, pirq))) {
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pirq += 64;
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continue;
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}
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if (except_pirq && pirq == except_pirq) {
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continue;
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}
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if (s->pirq[pirq].dev != dev) {
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continue;
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}
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if (vector != -1 && s->pirq[pirq].vector != vector) {
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continue;
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}
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/* It could theoretically be bound to a port already, but that is OK. */
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s->pirq[pirq].dev = dev;
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s->pirq[pirq].gsi = IRQ_UNBOUND;
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s->pirq[pirq].is_msix = false;
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s->pirq[pirq].vector = 0;
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s->pirq[pirq].is_masked = false;
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s->pirq[pirq].is_translated = false;
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}
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}
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void xen_evtchn_remove_pci_device(PCIDevice *dev)
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{
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XenEvtchnState *s = xen_evtchn_singleton;
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if (!s) {
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return;
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}
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QEMU_LOCK_GUARD(&s->port_lock);
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do_remove_pci_vector(s, dev, -1, 0);
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}
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void xen_evtchn_snoop_msi(PCIDevice *dev, bool is_msix, unsigned int vector,
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uint64_t addr, uint32_t data, bool is_masked)
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{
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XenEvtchnState *s = xen_evtchn_singleton;
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uint32_t pirq;
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if (!s) {
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return;
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}
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assert(qemu_mutex_iothread_locked());
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pirq = msi_pirq_target(addr, data);
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/*
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* The PIRQ# must be sane, and there must be an allocated PIRQ in
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* IRQ_UNBOUND or IRQ_MSI_EMU state to match it.
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*/
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if (!pirq || pirq >= s->nr_pirqs || !pirq_inuse(s, pirq) ||
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(s->pirq[pirq].gsi != IRQ_UNBOUND &&
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s->pirq[pirq].gsi != IRQ_MSI_EMU)) {
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pirq = 0;
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}
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if (pirq) {
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s->pirq[pirq].dev = dev;
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s->pirq[pirq].gsi = IRQ_MSI_EMU;
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s->pirq[pirq].is_msix = is_msix;
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s->pirq[pirq].vector = vector;
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s->pirq[pirq].is_masked = is_masked;
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}
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/* Remove any (other) entries for this {device, vector} */
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do_remove_pci_vector(s, dev, vector, pirq);
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}
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int xen_evtchn_translate_pirq_msi(struct kvm_irq_routing_entry *route,
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uint64_t address, uint32_t data)
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{
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XenEvtchnState *s = xen_evtchn_singleton;
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uint32_t pirq, port;
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CPUState *cpu;
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if (!s) {
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return 1; /* Not a PIRQ */
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}
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assert(qemu_mutex_iothread_locked());
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pirq = msi_pirq_target(address, data);
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if (!pirq || pirq >= s->nr_pirqs) {
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return 1; /* Not a PIRQ */
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}
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if (!kvm_xen_has_cap(EVTCHN_2LEVEL)) {
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return -ENOTSUP;
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}
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if (s->pirq[pirq].gsi != IRQ_MSI_EMU) {
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return -EINVAL;
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}
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/* Remember that KVM tried to translate this. It might need to try again. */
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s->pirq[pirq].is_translated = true;
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QEMU_LOCK_GUARD(&s->port_lock);
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port = s->pirq[pirq].port;
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if (!valid_port(port)) {
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return -EINVAL;
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}
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cpu = qemu_get_cpu(s->port_table[port].vcpu);
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if (!cpu) {
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return -EINVAL;
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}
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route->type = KVM_IRQ_ROUTING_XEN_EVTCHN;
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route->u.xen_evtchn.port = port;
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route->u.xen_evtchn.vcpu = kvm_arch_vcpu_id(cpu);
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route->u.xen_evtchn.priority = KVM_IRQ_ROUTING_XEN_EVTCHN_PRIO_2LEVEL;
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return 0; /* Handled */
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}
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bool xen_evtchn_deliver_pirq_msi(uint64_t address, uint32_t data)
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{
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XenEvtchnState *s = xen_evtchn_singleton;
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uint32_t pirq, port;
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if (!s) {
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return false;
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}
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assert(qemu_mutex_iothread_locked());
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pirq = msi_pirq_target(address, data);
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if (!pirq || pirq >= s->nr_pirqs) {
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return false;
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}
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QEMU_LOCK_GUARD(&s->port_lock);
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port = s->pirq[pirq].port;
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if (!valid_port(port)) {
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return false;
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}
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set_port_pending(s, port);
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return true;
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}
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int xen_physdev_map_pirq(struct physdev_map_pirq *map)
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{
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XenEvtchnState *s = xen_evtchn_singleton;
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@ -1569,6 +1805,7 @@ int xen_physdev_map_pirq(struct physdev_map_pirq *map)
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return -ENOTSUP;
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}
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QEMU_IOTHREAD_LOCK_GUARD();
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QEMU_LOCK_GUARD(&s->port_lock);
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if (map->domid != DOMID_SELF && map->domid != xen_domid) {
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@ -1628,9 +1865,11 @@ int xen_physdev_unmap_pirq(struct physdev_unmap_pirq *unmap)
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return -EINVAL;
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}
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QEMU_LOCK_GUARD(&s->port_lock);
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QEMU_IOTHREAD_LOCK_GUARD();
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qemu_mutex_lock(&s->port_lock);
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if (!pirq_inuse(s, pirq)) {
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qemu_mutex_unlock(&s->port_lock);
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return -ENOENT;
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}
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@ -1638,6 +1877,7 @@ int xen_physdev_unmap_pirq(struct physdev_unmap_pirq *unmap)
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/* We can only unmap GSI PIRQs */
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if (gsi < 0) {
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qemu_mutex_unlock(&s->port_lock);
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return -EINVAL;
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}
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|
||||
@ -1646,6 +1886,12 @@ int xen_physdev_unmap_pirq(struct physdev_unmap_pirq *unmap)
|
||||
pirq_inuse_word(s, pirq) &= ~pirq_inuse_bit(pirq);
|
||||
|
||||
trace_kvm_xen_unmap_pirq(pirq, gsi);
|
||||
qemu_mutex_unlock(&s->port_lock);
|
||||
|
||||
if (gsi == IRQ_MSI_EMU) {
|
||||
kvm_update_msi_routes_all(NULL, true, 0, 0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1659,6 +1905,7 @@ int xen_physdev_eoi_pirq(struct physdev_eoi *eoi)
|
||||
return -ENOTSUP;
|
||||
}
|
||||
|
||||
QEMU_IOTHREAD_LOCK_GUARD();
|
||||
QEMU_LOCK_GUARD(&s->port_lock);
|
||||
|
||||
if (!pirq_inuse(s, pirq)) {
|
||||
@ -1690,6 +1937,7 @@ int xen_physdev_query_pirq(struct physdev_irq_status_query *query)
|
||||
return -ENOTSUP;
|
||||
}
|
||||
|
||||
QEMU_IOTHREAD_LOCK_GUARD();
|
||||
QEMU_LOCK_GUARD(&s->port_lock);
|
||||
|
||||
if (!pirq_inuse(s, pirq)) {
|
||||
|
||||
@ -25,6 +25,14 @@ void xen_evtchn_set_callback_level(int level);
|
||||
int xen_evtchn_set_port(uint16_t port);
|
||||
|
||||
bool xen_evtchn_set_gsi(int gsi, int level);
|
||||
void xen_evtchn_snoop_msi(PCIDevice *dev, bool is_msix, unsigned int vector,
|
||||
uint64_t addr, uint32_t data, bool is_masked);
|
||||
void xen_evtchn_remove_pci_device(PCIDevice *dev);
|
||||
struct kvm_irq_routing_entry;
|
||||
int xen_evtchn_translate_pirq_msi(struct kvm_irq_routing_entry *route,
|
||||
uint64_t address, uint32_t data);
|
||||
bool xen_evtchn_deliver_pirq_msi(uint64_t address, uint32_t data);
|
||||
|
||||
|
||||
/*
|
||||
* These functions mirror the libxenevtchn library API, providing the QEMU
|
||||
|
||||
11
hw/pci/msi.c
11
hw/pci/msi.c
@ -24,6 +24,8 @@
|
||||
#include "qemu/range.h"
|
||||
#include "qapi/error.h"
|
||||
|
||||
#include "hw/i386/kvm/xen_evtchn.h"
|
||||
|
||||
/* PCI_MSI_ADDRESS_LO */
|
||||
#define PCI_MSI_ADDRESS_LO_MASK (~0x3)
|
||||
|
||||
@ -414,6 +416,15 @@ void msi_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len)
|
||||
fprintf(stderr, "\n");
|
||||
#endif
|
||||
|
||||
if (xen_mode == XEN_EMULATE) {
|
||||
for (vector = 0; vector < msi_nr_vectors(flags); vector++) {
|
||||
MSIMessage msg = msi_prepare_message(dev, vector);
|
||||
|
||||
xen_evtchn_snoop_msi(dev, false, vector, msg.address, msg.data,
|
||||
msi_is_masked(dev, vector));
|
||||
}
|
||||
}
|
||||
|
||||
if (!(flags & PCI_MSI_FLAGS_ENABLE)) {
|
||||
return;
|
||||
}
|
||||
|
||||
@ -26,6 +26,8 @@
|
||||
#include "qapi/error.h"
|
||||
#include "trace.h"
|
||||
|
||||
#include "hw/i386/kvm/xen_evtchn.h"
|
||||
|
||||
/* MSI enable bit and maskall bit are in byte 1 in FLAGS register */
|
||||
#define MSIX_CONTROL_OFFSET (PCI_MSIX_FLAGS + 1)
|
||||
#define MSIX_ENABLE_MASK (PCI_MSIX_FLAGS_ENABLE >> 8)
|
||||
@ -124,6 +126,13 @@ static void msix_handle_mask_update(PCIDevice *dev, int vector, bool was_masked)
|
||||
{
|
||||
bool is_masked = msix_is_masked(dev, vector);
|
||||
|
||||
if (xen_mode == XEN_EMULATE) {
|
||||
MSIMessage msg = msix_prepare_message(dev, vector);
|
||||
|
||||
xen_evtchn_snoop_msi(dev, true, vector, msg.address, msg.data,
|
||||
is_masked);
|
||||
}
|
||||
|
||||
if (is_masked == was_masked) {
|
||||
return;
|
||||
}
|
||||
|
||||
17
hw/pci/pci.c
17
hw/pci/pci.c
@ -49,6 +49,9 @@
|
||||
#include "qemu/cutils.h"
|
||||
#include "pci-internal.h"
|
||||
|
||||
#include "hw/xen/xen.h"
|
||||
#include "hw/i386/kvm/xen_evtchn.h"
|
||||
|
||||
//#define DEBUG_PCI
|
||||
#ifdef DEBUG_PCI
|
||||
# define PCI_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
|
||||
@ -319,6 +322,17 @@ static void pci_msi_trigger(PCIDevice *dev, MSIMessage msg)
|
||||
{
|
||||
MemTxAttrs attrs = {};
|
||||
|
||||
/*
|
||||
* Xen uses the high bits of the address to contain some of the bits
|
||||
* of the PIRQ#. Therefore we can't just send the write cycle and
|
||||
* trust that it's caught by the APIC at 0xfee00000 because the
|
||||
* target of the write might be e.g. 0x0x1000fee46000 for PIRQ#4166.
|
||||
* So we intercept the delivery here instead of in kvm_send_msi().
|
||||
*/
|
||||
if (xen_mode == XEN_EMULATE &&
|
||||
xen_evtchn_deliver_pirq_msi(msg.address, msg.data)) {
|
||||
return;
|
||||
}
|
||||
attrs.requester_id = pci_requester_id(dev);
|
||||
address_space_stl_le(&dev->bus_master_as, msg.address, msg.data,
|
||||
attrs, NULL);
|
||||
@ -988,6 +1002,9 @@ static void do_pci_unregister_device(PCIDevice *pci_dev)
|
||||
pci_get_bus(pci_dev)->devices[pci_dev->devfn] = NULL;
|
||||
pci_config_free(pci_dev);
|
||||
|
||||
if (xen_mode == XEN_EMULATE) {
|
||||
xen_evtchn_remove_pci_device(pci_dev);
|
||||
}
|
||||
if (memory_region_is_mapped(&pci_dev->bus_master_enable_region)) {
|
||||
memory_region_del_subregion(&pci_dev->bus_master_container_region,
|
||||
&pci_dev->bus_master_enable_region);
|
||||
|
||||
@ -33,6 +33,7 @@ extern bool msi_nonbroken;
|
||||
void msi_set_message(PCIDevice *dev, MSIMessage msg);
|
||||
MSIMessage msi_get_message(PCIDevice *dev, unsigned int vector);
|
||||
bool msi_enabled(const PCIDevice *dev);
|
||||
void msi_set_enabled(PCIDevice *dev);
|
||||
int msi_init(struct PCIDevice *dev, uint8_t offset,
|
||||
unsigned int nr_vectors, bool msi64bit,
|
||||
bool msi_per_vector_mask, Error **errp);
|
||||
|
||||
@ -44,6 +44,7 @@
|
||||
#include "qemu/error-report.h"
|
||||
#include "qemu/memalign.h"
|
||||
#include "hw/i386/x86.h"
|
||||
#include "hw/i386/kvm/xen_evtchn.h"
|
||||
#include "hw/i386/pc.h"
|
||||
#include "hw/i386/apic.h"
|
||||
#include "hw/i386/apic_internal.h"
|
||||
@ -5654,6 +5655,20 @@ int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_XEN_EMU
|
||||
if (xen_mode == XEN_EMULATE) {
|
||||
int handled = xen_evtchn_translate_pirq_msi(route, address, data);
|
||||
|
||||
/*
|
||||
* If it was a PIRQ and successfully routed (handled == 0) or it was
|
||||
* an error (handled < 0), return. If it wasn't a PIRQ, keep going.
|
||||
*/
|
||||
if (handled <= 0) {
|
||||
return handled;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
address = kvm_swizzle_msi_ext_dest_id(address);
|
||||
route->u.msi.address_hi = address >> VTD_MSI_ADDR_HI_SHIFT;
|
||||
route->u.msi.address_lo = address & VTD_MSI_ADDR_LO_MASK;
|
||||
@ -5673,8 +5688,8 @@ struct MSIRouteEntry {
|
||||
static QLIST_HEAD(, MSIRouteEntry) msi_route_list = \
|
||||
QLIST_HEAD_INITIALIZER(msi_route_list);
|
||||
|
||||
static void kvm_update_msi_routes_all(void *private, bool global,
|
||||
uint32_t index, uint32_t mask)
|
||||
void kvm_update_msi_routes_all(void *private, bool global,
|
||||
uint32_t index, uint32_t mask)
|
||||
{
|
||||
int cnt = 0, vector;
|
||||
MSIRouteEntry *entry;
|
||||
|
||||
@ -51,6 +51,8 @@ bool kvm_hv_vpindex_settable(void);
|
||||
bool kvm_hyperv_expand_features(X86CPU *cpu, Error **errp);
|
||||
|
||||
uint64_t kvm_swizzle_msi_ext_dest_id(uint64_t address);
|
||||
void kvm_update_msi_routes_all(void *private, bool global,
|
||||
uint32_t index, uint32_t mask);
|
||||
|
||||
bool kvm_enable_sgx_provisioning(KVMState *s);
|
||||
void kvm_request_xsave_components(X86CPU *cpu, uint64_t mask);
|
||||
|
||||
@ -267,7 +267,8 @@ static bool kvm_xen_hcall_xen_version(struct kvm_xen_exit *exit, X86CPU *cpu,
|
||||
1 << XENFEAT_auto_translated_physmap |
|
||||
1 << XENFEAT_supervisor_mode_kernel |
|
||||
1 << XENFEAT_hvm_callback_vector |
|
||||
1 << XENFEAT_hvm_safe_pvclock;
|
||||
1 << XENFEAT_hvm_safe_pvclock |
|
||||
1 << XENFEAT_hvm_pirqs;
|
||||
}
|
||||
|
||||
err = kvm_copy_to_gva(CPU(cpu), arg, &fi, sizeof(fi));
|
||||
|
||||
Loading…
Reference in New Issue
Block a user