target/loongarch: Drop temp_new
Translators are no longer required to free tcg temporaries, therefore there's no need to record temps for later freeing. Replace the few uses with tcg_temp_new. Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -243,7 +243,7 @@ static bool trans_csrwr(DisasContext *ctx, arg_csrwr *a)
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dest = gpr_dst(ctx, a->rd, EXT_NONE);
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dest = gpr_dst(ctx, a->rd, EXT_NONE);
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csr->writefn(dest, cpu_env, src1);
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csr->writefn(dest, cpu_env, src1);
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} else {
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} else {
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dest = temp_new(ctx);
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dest = tcg_temp_new();
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tcg_gen_ld_tl(dest, cpu_env, csr->offset);
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tcg_gen_ld_tl(dest, cpu_env, csr->offset);
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tcg_gen_st_tl(src1, cpu_env, csr->offset);
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tcg_gen_st_tl(src1, cpu_env, csr->offset);
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}
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}
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@ -85,9 +85,6 @@ static void loongarch_tr_init_disas_context(DisasContextBase *dcbase,
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bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4;
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bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4;
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ctx->base.max_insns = MIN(ctx->base.max_insns, bound);
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ctx->base.max_insns = MIN(ctx->base.max_insns, bound);
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ctx->ntemp = 0;
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memset(ctx->temp, 0, sizeof(ctx->temp));
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ctx->zero = tcg_constant_tl(0);
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ctx->zero = tcg_constant_tl(0);
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}
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}
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@ -110,12 +107,6 @@ static void loongarch_tr_insn_start(DisasContextBase *dcbase, CPUState *cs)
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*
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*
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* Further, we may provide an extension for word operations.
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* Further, we may provide an extension for word operations.
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*/
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*/
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static TCGv temp_new(DisasContext *ctx)
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{
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assert(ctx->ntemp < ARRAY_SIZE(ctx->temp));
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return ctx->temp[ctx->ntemp++] = tcg_temp_new();
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}
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static TCGv gpr_src(DisasContext *ctx, int reg_num, DisasExtend src_ext)
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static TCGv gpr_src(DisasContext *ctx, int reg_num, DisasExtend src_ext)
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{
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{
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TCGv t;
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TCGv t;
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@ -128,11 +119,11 @@ static TCGv gpr_src(DisasContext *ctx, int reg_num, DisasExtend src_ext)
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case EXT_NONE:
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case EXT_NONE:
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return cpu_gpr[reg_num];
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return cpu_gpr[reg_num];
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case EXT_SIGN:
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case EXT_SIGN:
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t = temp_new(ctx);
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t = tcg_temp_new();
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tcg_gen_ext32s_tl(t, cpu_gpr[reg_num]);
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tcg_gen_ext32s_tl(t, cpu_gpr[reg_num]);
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return t;
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return t;
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case EXT_ZERO:
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case EXT_ZERO:
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t = temp_new(ctx);
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t = tcg_temp_new();
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tcg_gen_ext32u_tl(t, cpu_gpr[reg_num]);
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tcg_gen_ext32u_tl(t, cpu_gpr[reg_num]);
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return t;
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return t;
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}
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}
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@ -142,7 +133,7 @@ static TCGv gpr_src(DisasContext *ctx, int reg_num, DisasExtend src_ext)
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static TCGv gpr_dst(DisasContext *ctx, int reg_num, DisasExtend dst_ext)
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static TCGv gpr_dst(DisasContext *ctx, int reg_num, DisasExtend dst_ext)
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{
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{
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if (reg_num == 0 || dst_ext) {
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if (reg_num == 0 || dst_ext) {
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return temp_new(ctx);
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return tcg_temp_new();
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}
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}
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return cpu_gpr[reg_num];
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return cpu_gpr[reg_num];
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}
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}
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@ -195,12 +186,6 @@ static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
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generate_exception(ctx, EXCCODE_INE);
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generate_exception(ctx, EXCCODE_INE);
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}
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}
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for (int i = ctx->ntemp - 1; i >= 0; --i) {
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tcg_temp_free(ctx->temp[i]);
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ctx->temp[i] = NULL;
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}
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ctx->ntemp = 0;
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ctx->base.pc_next += 4;
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ctx->base.pc_next += 4;
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}
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}
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@ -32,9 +32,6 @@ typedef struct DisasContext {
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uint16_t mem_idx;
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uint16_t mem_idx;
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uint16_t plv;
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uint16_t plv;
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TCGv zero;
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TCGv zero;
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/* Space for 3 operands plus 1 extra for address computation. */
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TCGv temp[4];
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uint8_t ntemp;
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} DisasContext;
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} DisasContext;
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void generate_exception(DisasContext *ctx, int excp);
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void generate_exception(DisasContext *ctx, int excp);
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