OpenE2K/qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

hw/isa/piix3: Wire up Xen PCI IRQ handling outside of PIIX3

Browse Source 
xen_intx_set_irq() doesn't depend on PIIX3State. In order to resolve
TYPE_PIIX3_XEN_DEVICE and in order to make Xen agnostic about the
precise south bridge being used, set up Xen's PCI IRQ handling of PIIX3
in the board.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
Tested-by: Chuck Zmudzinski <brchuckz@aol.com>
Message-Id: <20230312120221.99183-4-shentey@gmail.com>
Message-Id: <20230403074124.3925-5-shentey@gmail.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
This commit is contained in:
Bernhard Beschow 2023-04-03 09:41:21 +02:00 committed by Anthony PERARD
parent a58a31a6a1
commit 60a9eb57f3
2 changed files with 14 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
hw/i386/pc_piix.c
View File

@ -71,6 +71,7 @@
#include "kvm/kvm-cpu.h"
#define MAX_IDE_BUS 2
#define XEN_IOAPIC_NUM_PIRQS 128ULL
#ifdef CONFIG_IDE_ISA
static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
@ -238,6 +239,18 @@ static void pc_init1(MachineState *machine,
pcms->bus = pci_bus;
pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type);
if (xen_enabled()) {
/*
* Xen supports additional interrupt routes from the PCI devices to
* the IOAPIC: the four pins of each PCI device on the bus are also
* connected to the IOAPIC directly.
* These additional routes can be discovered through ACPI.
*/
pci_bus_irqs(pci_bus, xen_intx_set_irq, pci_dev,
XEN_IOAPIC_NUM_PIRQS);
}
piix3 = PIIX3_PCI_DEVICE(pci_dev);
piix3->pic = x86ms->gsi;
piix3_devfn = piix3->dev.devfn;

24
hw/isa/piix3.c
View File

@ -35,8 +35,6 @@
#include "migration/vmstate.h"
#include "hw/acpi/acpi_aml_interface.h"
#define XEN_IOAPIC_NUM_PIRQS 128ULL
static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq)
{
qemu_set_irq(piix3->pic[pic_irq],
@ -403,32 +401,12 @@ static const TypeInfo piix3_info = {
.class_init = piix3_class_init,
};
static void piix3_xen_realize(PCIDevice *dev, Error **errp)
{
ERRP_GUARD();
PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
piix3_realize(dev, errp);
if (*errp) {
return;
}
/*
* Xen supports additional interrupt routes from the PCI devices to
* the IOAPIC: the four pins of each PCI device on the bus are also
* connected to the IOAPIC directly.
* These additional routes can be discovered through ACPI.
*/
pci_bus_irqs(pci_bus, xen_intx_set_irq, piix3, XEN_IOAPIC_NUM_PIRQS);
}
static void piix3_xen_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->config_write = piix3_write_config_xen;
k->realize = piix3_xen_realize;
k->realize = piix3_realize;
}
static const TypeInfo piix3_xen_info = {