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target/arm: AArch32 VCVT fixed-point to float is always round-to-nearest 

For AArch32, unlike the VCVT of integer to float, which honours the
rounding mode specified by the FPSCR, VCVT of fixed-point to float is
always round-to-nearest. (AArch64 fixed-point-to-float conversions
always honour the FPCR rounding mode.)

Implement this by providing _round_to_nearest versions of the
relevant helpers which set the rounding mode temporarily when making
the call to the underlying softfloat function.

We only need to change the VFP VCVT instructions, because the
standard- FPSCR value used by the Neon VCVT is always set to
round-to-nearest, so we don't need to do the extra work of saving
and restoring the rounding mode.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201013103532.13391-1-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2020-10-13 11:35:32 +01:00
parent 5288145d71
commit 61db12d9f9
3 changed files with 47 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
target/arm/helper.h
View File

@ -213,6 +213,19 @@ DEF_HELPER_3(vfp_ultoh, f16, i32, i32, ptr)
DEF_HELPER_3(vfp_sqtoh, f16, i64, i32, ptr)
DEF_HELPER_3(vfp_uqtoh, f16, i64, i32, ptr)
DEF_HELPER_3(vfp_shtos_round_to_nearest, f32, i32, i32, ptr)
DEF_HELPER_3(vfp_sltos_round_to_nearest, f32, i32, i32, ptr)
DEF_HELPER_3(vfp_uhtos_round_to_nearest, f32, i32, i32, ptr)
DEF_HELPER_3(vfp_ultos_round_to_nearest, f32, i32, i32, ptr)
DEF_HELPER_3(vfp_shtod_round_to_nearest, f64, i64, i32, ptr)
DEF_HELPER_3(vfp_sltod_round_to_nearest, f64, i64, i32, ptr)
DEF_HELPER_3(vfp_uhtod_round_to_nearest, f64, i64, i32, ptr)
DEF_HELPER_3(vfp_ultod_round_to_nearest, f64, i64, i32, ptr)
DEF_HELPER_3(vfp_shtoh_round_to_nearest, f16, i32, i32, ptr)
DEF_HELPER_3(vfp_uhtoh_round_to_nearest, f16, i32, i32, ptr)
DEF_HELPER_3(vfp_sltoh_round_to_nearest, f16, i32, i32, ptr)
DEF_HELPER_3(vfp_ultoh_round_to_nearest, f16, i32, i32, ptr)
DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, ptr)
DEF_HELPER_FLAGS_3(vfp_fcvt_f16_to_f32, TCG_CALL_NO_RWG, f32, f16, ptr, i32)

24
target/arm/translate-vfp.c.inc
View File

@ -3141,16 +3141,16 @@ static bool trans_VCVT_fix_hp(DisasContext *s, arg_VCVT_fix_sp *a)
/* Switch on op:U:sx bits */
switch (a->opc) {
case 0:
gen_helper_vfp_shtoh(vd, vd, shift, fpst);
gen_helper_vfp_shtoh_round_to_nearest(vd, vd, shift, fpst);
break;
case 1:
gen_helper_vfp_sltoh(vd, vd, shift, fpst);
gen_helper_vfp_sltoh_round_to_nearest(vd, vd, shift, fpst);
break;
case 2:
gen_helper_vfp_uhtoh(vd, vd, shift, fpst);
gen_helper_vfp_uhtoh_round_to_nearest(vd, vd, shift, fpst);
break;
case 3:
gen_helper_vfp_ultoh(vd, vd, shift, fpst);
gen_helper_vfp_ultoh_round_to_nearest(vd, vd, shift, fpst);
break;
case 4:
gen_helper_vfp_toshh_round_to_zero(vd, vd, shift, fpst);
@ -3200,16 +3200,16 @@ static bool trans_VCVT_fix_sp(DisasContext *s, arg_VCVT_fix_sp *a)
/* Switch on op:U:sx bits */
switch (a->opc) {
case 0:
gen_helper_vfp_shtos(vd, vd, shift, fpst);
gen_helper_vfp_shtos_round_to_nearest(vd, vd, shift, fpst);
break;
case 1:
gen_helper_vfp_sltos(vd, vd, shift, fpst);
gen_helper_vfp_sltos_round_to_nearest(vd, vd, shift, fpst);
break;
case 2:
gen_helper_vfp_uhtos(vd, vd, shift, fpst);
gen_helper_vfp_uhtos_round_to_nearest(vd, vd, shift, fpst);
break;
case 3:
gen_helper_vfp_ultos(vd, vd, shift, fpst);
gen_helper_vfp_ultos_round_to_nearest(vd, vd, shift, fpst);
break;
case 4:
gen_helper_vfp_toshs_round_to_zero(vd, vd, shift, fpst);
@ -3265,16 +3265,16 @@ static bool trans_VCVT_fix_dp(DisasContext *s, arg_VCVT_fix_dp *a)
/* Switch on op:U:sx bits */
switch (a->opc) {
case 0:
gen_helper_vfp_shtod(vd, vd, shift, fpst);
gen_helper_vfp_shtod_round_to_nearest(vd, vd, shift, fpst);
break;
case 1:
gen_helper_vfp_sltod(vd, vd, shift, fpst);
gen_helper_vfp_sltod_round_to_nearest(vd, vd, shift, fpst);
break;
case 2:
gen_helper_vfp_uhtod(vd, vd, shift, fpst);
gen_helper_vfp_uhtod_round_to_nearest(vd, vd, shift, fpst);
break;
case 3:
gen_helper_vfp_ultod(vd, vd, shift, fpst);
gen_helper_vfp_ultod_round_to_nearest(vd, vd, shift, fpst);
break;
case 4:
gen_helper_vfp_toshd_round_to_zero(vd, vd, shift, fpst);

23
target/arm/vfp_helper.c
View File

@ -393,12 +393,32 @@ float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env)
return float64_to_float32(x, &env->vfp.fp_status);
}
/* VFP3 fixed point conversion. */
/*
* VFP3 fixed point conversion. The AArch32 versions of fix-to-float
* must always round-to-nearest; the AArch64 ones honour the FPSCR
* rounding mode. (For AArch32 Neon the standard-FPSCR is set to
* round-to-nearest so either helper will work.) AArch32 float-to-fix
* must round-to-zero.
*/
#define VFP_CONV_FIX_FLOAT(name, p, fsz, ftype, isz, itype) \
ftype HELPER(vfp_##name##to##p)(uint##isz##_t x, uint32_t shift, \
void *fpstp) \
{ return itype##_to_##float##fsz##_scalbn(x, -shift, fpstp); }
#define VFP_CONV_FIX_FLOAT_ROUND(name, p, fsz, ftype, isz, itype) \
ftype HELPER(vfp_##name##to##p##_round_to_nearest)(uint##isz##_t x, \
uint32_t shift, \
void *fpstp) \
{ \
ftype ret; \
float_status *fpst = fpstp; \
FloatRoundMode oldmode = fpst->float_rounding_mode; \
fpst->float_rounding_mode = float_round_nearest_even; \
ret = itype##_to_##float##fsz##_scalbn(x, -shift, fpstp); \
fpst->float_rounding_mode = oldmode; \
return ret; \
}
#define VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, ftype, isz, itype, ROUND, suff) \
uint##isz##_t HELPER(vfp_to##name##p##suff)(ftype x, uint32_t shift, \
void *fpst) \
@ -412,6 +432,7 @@ uint##isz##_t HELPER(vfp_to##name##p##suff)(ftype x, uint32_t shift, \
#define VFP_CONV_FIX(name, p, fsz, ftype, isz, itype) \
VFP_CONV_FIX_FLOAT(name, p, fsz, ftype, isz, itype) \
VFP_CONV_FIX_FLOAT_ROUND(name, p, fsz, ftype, isz, itype) \
VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, ftype, isz, itype, \
float_round_to_zero, _round_to_zero) \
VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, ftype, isz, itype, \