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QOM infrastructure fixes and device conversions

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* QTest cleanups and test cases for PCI NICs
 * NAND fix for "info qtree"
 * Cleanup and extension of QOM machine tests
 * IndustryPack test cases and conversion to QOM realize
 * I2C cleanups
 * Cleanups of legacy qdev properties
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Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' into staging

QOM infrastructure fixes and device conversions

* QTest cleanups and test cases for PCI NICs
* NAND fix for "info qtree"
* Cleanup and extension of QOM machine tests
* IndustryPack test cases and conversion to QOM realize
* I2C cleanups
* Cleanups of legacy qdev properties

# gpg: Signature made Mon 17 Feb 2014 22:15:37 GMT using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg:                 aka "Andreas Färber <afaerber@suse.com>"

* remotes/afaerber/tags/qom-devices-for-peter: (49 commits)
  qtest: Include system headers before user headers
  qapi: Refine human printing of sizes
  qdev: Use QAPI type names for properties
  qdev: Add enum property types to QAPI schema
  block: Handle "rechs" and "large" translation options
  qdev: Remove hex8/32/64 property types
  qdev: Remove most legacy printers
  qdev: Use human mode in "info qtree"
  qapi: Add human mode to StringOutputVisitor
  qdev: Inline qdev_prop_parse()
  qdev: Legacy properties are just strings
  qdev: Legacy properties are now read-only
  qdev: Remove legacy parsers for hex8/32/64
  qdev: Sizes are now parsed by StringInputVisitor
  qapi: Add size parser to StringInputVisitor
  qtest: Don't segfault with invalid -qtest option
  ipack: Move IndustryPack out of hw/char/
  ipoctal232: QOM parent field cleanup
  ipack: QOM parent field cleanup for IPackDevice
  ipack: QOM parent field cleanup for IPackBus
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2014-02-20 13:05:47 +00:00
commit 61e8a92364
124 changed files with 1049 additions and 865 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
blockdev.c
View File

@ -779,6 +779,10 @@ DriveInfo *drive_init(QemuOpts *all_opts, BlockInterfaceType block_default_type)
translation = BIOS_ATA_TRANSLATION_NONE;
} else if (!strcmp(value, "lba")) {
translation = BIOS_ATA_TRANSLATION_LBA;
} else if (!strcmp(value, "large")) {
translation = BIOS_ATA_TRANSLATION_LARGE;
} else if (!strcmp(value, "rechs")) {
translation = BIOS_ATA_TRANSLATION_RECHS;
} else if (!strcmp(value, "auto")) {
translation = BIOS_ATA_TRANSLATION_AUTO;
} else {

1
default-configs/ppc-softmmu.mak
View File

@ -42,6 +42,7 @@ CONFIG_XILINX=y
CONFIG_XILINX_ETHLITE=y
CONFIG_OPENPIC=y
CONFIG_PREP=y
CONFIG_MAC=y
CONFIG_E500=y
CONFIG_OPENPIC_KVM=$(and $(CONFIG_E500),$(CONFIG_KVM))
# For PReP

1
default-configs/ppc64-softmmu.mak
View File

@ -43,6 +43,7 @@ CONFIG_XILINX_ETHLITE=y
CONFIG_OPENPIC=y
CONFIG_PSERIES=y
CONFIG_PREP=y
CONFIG_MAC=y
CONFIG_E500=y
CONFIG_OPENPIC_KVM=$(and $(CONFIG_E500),$(CONFIG_KVM))
# For pSeries

20
default-configs/ppcemb-softmmu.mak
View File

@ -3,30 +3,12 @@
include pci.mak
include sound.mak
include usb.mak
CONFIG_ISA_MMIO=y
CONFIG_ESCC=y
CONFIG_M48T59=y
CONFIG_VGA=y
CONFIG_VGA_PCI=y
CONFIG_SERIAL=y
CONFIG_I8254=y
CONFIG_FDC=y
CONFIG_I8257=y
CONFIG_OPENPIC=y
CONFIG_MACIO=y
CONFIG_CUDA=y
CONFIG_ADB=y
CONFIG_MAC_NVRAM=y
CONFIG_MAC_DBDMA=y
CONFIG_HEATHROW_PIC=y
CONFIG_GRACKLE_PCI=y
CONFIG_UNIN_PCI=y
CONFIG_DEC_PCI=y
CONFIG_PPCE500_PCI=y
CONFIG_IDE_ISA=y
CONFIG_IDE_CMD646=y
CONFIG_IDE_MACIO=y
CONFIG_NE2000_ISA=y
CONFIG_PFLASH_CFI01=y
CONFIG_PFLASH_CFI02=y
CONFIG_PTIMER=y
@ -34,5 +16,3 @@ CONFIG_I8259=y
CONFIG_XILINX=y
CONFIG_XILINX_ETHLITE=y
CONFIG_OPENPIC=y
CONFIG_E500=y
CONFIG_OPENPIC_KVM=$(and $(CONFIG_E500),$(CONFIG_KVM))

1
hw/Makefile.objs
View File

@ -12,6 +12,7 @@ devices-dirs-$(CONFIG_SOFTMMU) += i2c/
devices-dirs-$(CONFIG_SOFTMMU) += ide/
devices-dirs-$(CONFIG_SOFTMMU) += input/
devices-dirs-$(CONFIG_SOFTMMU) += intc/
devices-dirs-$(CONFIG_IPACK) += ipack/
devices-dirs-$(CONFIG_SOFTMMU) += isa/
devices-dirs-$(CONFIG_SOFTMMU) += misc/
devices-dirs-$(CONFIG_SOFTMMU) += net/

6
hw/acpi/piix4.c
View File

@ -439,9 +439,9 @@ Object *piix4_pm_find(void)
return o;
}
i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq, qemu_irq smi_irq,
int kvm_enabled, FWCfgState *fw_cfg)
I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq, qemu_irq smi_irq,
int kvm_enabled, FWCfgState *fw_cfg)
{
DeviceState *dev;
PIIX4PMState *s;

2
hw/arm/exynos4210.c
View File

@ -326,7 +326,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
busdev = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(busdev, 0, i2c_irq);
sysbus_mmio_map(busdev, 0, addr);
s->i2c_if[n] = (i2c_bus *)qdev_get_child_bus(dev, "i2c");
s->i2c_if[n] = (I2CBus *)qdev_get_child_bus(dev, "i2c");
}

4
hw/arm/musicpal.c
View File

@ -1593,7 +1593,7 @@ static void musicpal_init(QEMUMachineInitArgs *args)
DeviceState *key_dev;
DeviceState *wm8750_dev;
SysBusDevice *s;
i2c_bus *i2c;
I2CBus *i2c;
int i;
unsigned long flash_size;
DriveInfo *dinfo;
@ -1687,7 +1687,7 @@ static void musicpal_init(QEMUMachineInitArgs *args)
dev = sysbus_create_simple(TYPE_MUSICPAL_GPIO, MP_GPIO_BASE,
pic[MP_GPIO_IRQ]);
i2c_dev = sysbus_create_simple("gpio_i2c", -1, NULL);
i2c = (i2c_bus *)qdev_get_child_bus(i2c_dev, "i2c");
i2c = (I2CBus *)qdev_get_child_bus(i2c_dev, "i2c");
lcd_dev = sysbus_create_simple(TYPE_MUSICPAL_LCD, MP_LCD_BASE, NULL);
key_dev = sysbus_create_simple(TYPE_MUSICPAL_KEY, -1, NULL);

2
hw/arm/nseries.c
View File

@ -202,7 +202,7 @@ static void n8x0_i2c_setup(struct n800_s *s)
{
DeviceState *dev;
qemu_irq tmp_irq = qdev_get_gpio_in(s->mpu->gpio, N8X0_TMP105_GPIO);
i2c_bus *i2c = omap_i2c_bus(s->mpu->i2c[0]);
I2CBus *i2c = omap_i2c_bus(s->mpu->i2c[0]);
/* Attach a menelaus PM chip */
dev = i2c_create_slave(i2c, "twl92230", N8X0_MENELAUS_ADDR);

44
hw/arm/pxa2xx.c
View File

@ -1222,8 +1222,14 @@ static const TypeInfo pxa2xx_rtc_sysbus_info = {
};
/* I2C Interface */
typedef struct {
I2CSlave i2c;
#define TYPE_PXA2XX_I2C_SLAVE "pxa2xx-i2c-slave"
#define PXA2XX_I2C_SLAVE(obj) \
OBJECT_CHECK(PXA2xxI2CSlaveState, (obj), TYPE_PXA2XX_I2C_SLAVE)
typedef struct PXA2xxI2CSlaveState {
I2CSlave parent_obj;
PXA2xxI2CState *host;
} PXA2xxI2CSlaveState;
@ -1238,7 +1244,7 @@ struct PXA2xxI2CState {
MemoryRegion iomem;
PXA2xxI2CSlaveState *slave;
i2c_bus *bus;
I2CBus *bus;
qemu_irq irq;
uint32_t offset;
uint32_t region_size;
@ -1268,7 +1274,7 @@ static void pxa2xx_i2c_update(PXA2xxI2CState *s)
/* These are only stubs now. */
static void pxa2xx_i2c_event(I2CSlave *i2c, enum i2c_event event)
{
PXA2xxI2CSlaveState *slave = FROM_I2C_SLAVE(PXA2xxI2CSlaveState, i2c);
PXA2xxI2CSlaveState *slave = PXA2XX_I2C_SLAVE(i2c);
PXA2xxI2CState *s = slave->host;
switch (event) {
@ -1292,10 +1298,12 @@ static void pxa2xx_i2c_event(I2CSlave *i2c, enum i2c_event event)
static int pxa2xx_i2c_rx(I2CSlave *i2c)
{
PXA2xxI2CSlaveState *slave = FROM_I2C_SLAVE(PXA2xxI2CSlaveState, i2c);
PXA2xxI2CSlaveState *slave = PXA2XX_I2C_SLAVE(i2c);
PXA2xxI2CState *s = slave->host;
if ((s->control & (1 << 14)) || !(s->control & (1 << 6)))
if ((s->control & (1 << 14)) || !(s->control & (1 << 6))) {
return 0;
}
if (s->status & (1 << 0)) { /* RWM */
s->status |= 1 << 6; /* set ITE */
@ -1307,10 +1315,12 @@ static int pxa2xx_i2c_rx(I2CSlave *i2c)
static int pxa2xx_i2c_tx(I2CSlave *i2c, uint8_t data)
{
PXA2xxI2CSlaveState *slave = FROM_I2C_SLAVE(PXA2xxI2CSlaveState, i2c);
PXA2xxI2CSlaveState *slave = PXA2XX_I2C_SLAVE(i2c);
PXA2xxI2CState *s = slave->host;
if ((s->control & (1 << 14)) || !(s->control & (1 << 6)))
if ((s->control & (1 << 14)) || !(s->control & (1 << 6))) {
return 1;
}
if (!(s->status & (1 << 0))) { /* RWM */
s->status |= 1 << 7; /* set IRF */
@ -1325,6 +1335,7 @@ static uint64_t pxa2xx_i2c_read(void *opaque, hwaddr addr,
unsigned size)
{
PXA2xxI2CState *s = (PXA2xxI2CState *) opaque;
I2CSlave *slave;
addr -= s->offset;
switch (addr) {
@ -1333,7 +1344,8 @@ static uint64_t pxa2xx_i2c_read(void *opaque, hwaddr addr,
case ISR:
return s->status | (i2c_bus_busy(s->bus) << 2);
case ISAR:
return s->slave->i2c.address;
slave = I2C_SLAVE(s->slave);
return slave->address;
case IDBR:
return s->data;
case IBMR:
@ -1408,7 +1420,7 @@ static void pxa2xx_i2c_write(void *opaque, hwaddr addr,
break;
case ISAR:
i2c_set_slave_address(&s->slave->i2c, value & 0x7f);
i2c_set_slave_address(I2C_SLAVE(s->slave), value & 0x7f);
break;
case IDBR:
@ -1432,7 +1444,7 @@ static const VMStateDescription vmstate_pxa2xx_i2c_slave = {
.minimum_version_id = 1,
.minimum_version_id_old = 1,
.fields = (VMStateField []) {
VMSTATE_I2C_SLAVE(i2c, PXA2xxI2CSlaveState),
VMSTATE_I2C_SLAVE(parent_obj, PXA2xxI2CSlaveState),
VMSTATE_END_OF_LIST()
}
};
@ -1470,7 +1482,7 @@ static void pxa2xx_i2c_slave_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo pxa2xx_i2c_slave_info = {
.name = "pxa2xx-i2c-slave",
.name = TYPE_PXA2XX_I2C_SLAVE,
.parent = TYPE_I2C_SLAVE,
.instance_size = sizeof(PXA2xxI2CSlaveState),
.class_init = pxa2xx_i2c_slave_class_init,
@ -1482,7 +1494,7 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base,
DeviceState *dev;
SysBusDevice *i2c_dev;
PXA2xxI2CState *s;
i2c_bus *i2cbus;
I2CBus *i2cbus;
dev = qdev_create(NULL, TYPE_PXA2XX_I2C);
qdev_prop_set_uint32(dev, "size", region_size + 1);
@ -1496,8 +1508,8 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base,
s = PXA2XX_I2C(i2c_dev);
/* FIXME: Should the slave device really be on a separate bus? */
i2cbus = i2c_init_bus(dev, "dummy");
dev = i2c_create_slave(i2cbus, "pxa2xx-i2c-slave", 0);
s->slave = FROM_I2C_SLAVE(PXA2xxI2CSlaveState, I2C_SLAVE(dev));
dev = i2c_create_slave(i2cbus, TYPE_PXA2XX_I2C_SLAVE, 0);
s->slave = PXA2XX_I2C_SLAVE(dev);
s->slave->host = s;
return s;
@ -1518,7 +1530,7 @@ static int pxa2xx_i2c_initfn(SysBusDevice *sbd)
return 0;
}
i2c_bus *pxa2xx_i2c_bus(PXA2xxI2CState *s)
I2CBus *pxa2xx_i2c_bus(PXA2xxI2CState *s)
{
return s->bus;
}

4
hw/arm/realview.c
View File

@ -60,7 +60,7 @@ static void realview_init(QEMUMachineInitArgs *args,
qemu_irq mmc_irq[2];
PCIBus *pci_bus = NULL;
NICInfo *nd;
i2c_bus *i2c;
I2CBus *i2c;
int n;
int done_nic = 0;
qemu_irq cpu_irq[4];
@ -255,7 +255,7 @@ static void realview_init(QEMUMachineInitArgs *args,
}
dev = sysbus_create_simple("versatile_i2c", 0x10002000, NULL);
i2c = (i2c_bus *)qdev_get_child_bus(dev, "i2c");
i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
i2c_create_slave(i2c, "ds1338", 0x68);
/* Memory map for RealView Emulation Baseboard: */

2
hw/arm/spitz.c
View File

@ -734,7 +734,7 @@ static void spitz_wm8750_addr(void *opaque, int line, int level)
static void spitz_i2c_setup(PXA2xxState *cpu)
{
/* Attach the CPU on one end of our I2C bus. */
i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
DeviceState *wm;

8
hw/arm/stellaris.c
View File

@ -692,7 +692,7 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq,
typedef struct {
SysBusDevice parent_obj;
i2c_bus *bus;
I2CBus *bus;
qemu_irq irq;
MemoryRegion iomem;
uint32_t msa;
@ -868,7 +868,7 @@ static int stellaris_i2c_init(SysBusDevice *sbd)
{
DeviceState *dev = DEVICE(sbd);
stellaris_i2c_state *s = STELLARIS_I2C(dev);
i2c_bus *bus;
I2CBus *bus;
sysbus_init_irq(sbd, &s->irq);
bus = i2c_init_bus(dev, "i2c");
@ -1213,7 +1213,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
qemu_irq adc;
int sram_size;
int flash_size;
i2c_bus *i2c;
I2CBus *i2c;
DeviceState *dev;
int i;
int j;
@ -1256,7 +1256,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
if (board->dc2 & (1 << 12)) {
dev = sysbus_create_simple(TYPE_STELLARIS_I2C, 0x40020000, pic[8]);
i2c = (i2c_bus *)qdev_get_child_bus(dev, "i2c");
i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
if (board->peripherals & BP_OLED_I2C) {
i2c_create_slave(i2c, "ssd0303", 0x3d);
}

18
hw/arm/tosa.c
View File

@ -132,15 +132,20 @@ static int tosa_ssp_init(SSISlave *dev)
return 0;
}
#define TYPE_TOSA_DAC "tosa_dac"
#define TOSA_DAC(obj) OBJECT_CHECK(TosaDACState, (obj), TYPE_TOSA_DAC)
typedef struct {
I2CSlave i2c;
I2CSlave parent_obj;
int len;
char buf[3];
} TosaDACState;
static int tosa_dac_send(I2CSlave *i2c, uint8_t data)
{
TosaDACState *s = FROM_I2C_SLAVE(TosaDACState, i2c);
TosaDACState *s = TOSA_DAC(i2c);
s->buf[s->len] = data;
if (s->len ++ > 2) {
#ifdef VERBOSE
@ -159,7 +164,8 @@ static int tosa_dac_send(I2CSlave *i2c, uint8_t data)
static void tosa_dac_event(I2CSlave *i2c, enum i2c_event event)
{
TosaDACState *s = FROM_I2C_SLAVE(TosaDACState, i2c);
TosaDACState *s = TOSA_DAC(i2c);
s->len = 0;
switch (event) {
case I2C_START_SEND:
@ -194,8 +200,8 @@ static int tosa_dac_init(I2CSlave *i2c)
static void tosa_tg_init(PXA2xxState *cpu)
{
i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
i2c_create_slave(bus, "tosa_dac", DAC_BASE);
I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
i2c_create_slave(bus, TYPE_TOSA_DAC, DAC_BASE);
ssi_create_slave(cpu->ssp[1], "tosa-ssp");
}
@ -271,7 +277,7 @@ static void tosa_dac_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo tosa_dac_info = {
.name = "tosa_dac",
.name = TYPE_TOSA_DAC,
.parent = TYPE_I2C_SLAVE,
.instance_size = sizeof(TosaDACState),
.class_init = tosa_dac_class_init,

4
hw/arm/versatilepb.c
View File

@ -185,7 +185,7 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id)
DeviceState *pl041;
PCIBus *pci_bus;
NICInfo *nd;
i2c_bus *i2c;
I2CBus *i2c;
int n;
int done_smc = 0;
DriveInfo *dinfo;
@ -288,7 +288,7 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id)
sysbus_create_simple("pl031", 0x101e8000, pic[10]);
dev = sysbus_create_simple("versatile_i2c", 0x10002000, NULL);
i2c = (i2c_bus *)qdev_get_child_bus(dev, "i2c");
i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
i2c_create_slave(i2c, "ds1338", 0x68);
/* Add PL041 AACI Interface to the LM4549 codec */

22
hw/arm/z2.c
View File

@ -193,15 +193,20 @@ static const TypeInfo zipit_lcd_info = {
.class_init = zipit_lcd_class_init,
};
typedef struct {
I2CSlave i2c;
#define TYPE_AER915 "aer915"
#define AER915(obj) OBJECT_CHECK(AER915State, (obj), TYPE_AER915)
typedef struct AER915State {
I2CSlave parent_obj;
int len;
uint8_t buf[3];
} AER915State;
static int aer915_send(I2CSlave *i2c, uint8_t data)
{
AER915State *s = FROM_I2C_SLAVE(AER915State, i2c);
AER915State *s = AER915(i2c);
s->buf[s->len] = data;
if (s->len++ > 2) {
DPRINTF("%s: message too long (%i bytes)\n",
@ -219,7 +224,8 @@ static int aer915_send(I2CSlave *i2c, uint8_t data)
static void aer915_event(I2CSlave *i2c, enum i2c_event event)
{
AER915State *s = FROM_I2C_SLAVE(AER915State, i2c);
AER915State *s = AER915(i2c);
switch (event) {
case I2C_START_SEND:
s->len = 0;
@ -238,8 +244,8 @@ static void aer915_event(I2CSlave *i2c, enum i2c_event event)
static int aer915_recv(I2CSlave *slave)
{
AER915State *s = AER915(slave);
int retval = 0x00;
AER915State *s = FROM_I2C_SLAVE(AER915State, slave);
switch (s->buf[0]) {
/* Return hardcoded battery voltage,
@ -290,7 +296,7 @@ static void aer915_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo aer915_info = {
.name = "aer915",
.name = TYPE_AER915,
.parent = TYPE_I2C_SLAVE,
.instance_size = sizeof(AER915State),
.class_init = aer915_class_init,
@ -308,7 +314,7 @@ static void z2_init(QEMUMachineInitArgs *args)
DriveInfo *dinfo;
int be;
void *z2_lcd;
i2c_bus *bus;
I2CBus *bus;
DeviceState *wm;
if (!cpu_model) {
@ -351,7 +357,7 @@ static void z2_init(QEMUMachineInitArgs *args)
type_register_static(&aer915_info);
z2_lcd = ssi_create_slave(mpu->ssp[1], "zipit-lcd");
bus = pxa2xx_i2c_bus(mpu->i2c[0]);
i2c_create_slave(bus, "aer915", 0x55);
i2c_create_slave(bus, TYPE_AER915, 0x55);
wm = i2c_create_slave(bus, "wm8750", 0x1b);
mpu->i2s->opaque = wm;
mpu->i2s->codec_out = wm8750_dac_dat;

2
hw/audio/adlib.c
View File

@ -354,7 +354,7 @@ static void adlib_realizefn (DeviceState *dev, Error **errp)
}
static Property adlib_properties[] = {
DEFINE_PROP_HEX32 ("iobase", AdlibState, port, 0x220),
DEFINE_PROP_UINT32 ("iobase", AdlibState, port, 0x220),
DEFINE_PROP_UINT32 ("freq", AdlibState, freq, 44100),
DEFINE_PROP_END_OF_LIST (),
};

2
hw/audio/cs4231a.c
View File

@ -673,7 +673,7 @@ static int cs4231a_init (ISABus *bus)
}
static Property cs4231a_properties[] = {
DEFINE_PROP_HEX32 ("iobase", CSState, port, 0x534),
DEFINE_PROP_UINT32 ("iobase", CSState, port, 0x534),
DEFINE_PROP_UINT32 ("irq", CSState, irq, 9),
DEFINE_PROP_UINT32 ("dma", CSState, dma, 3),
DEFINE_PROP_END_OF_LIST (),

2
hw/audio/gus.c
View File

@ -304,7 +304,7 @@ static int GUS_init (ISABus *bus)
static Property gus_properties[] = {
DEFINE_PROP_UINT32 ("freq", GUSState, freq, 44100),
DEFINE_PROP_HEX32 ("iobase", GUSState, port, 0x240),
DEFINE_PROP_UINT32 ("iobase", GUSState, port, 0x240),
DEFINE_PROP_UINT32 ("irq", GUSState, emu.gusirq, 7),
DEFINE_PROP_UINT32 ("dma", GUSState, emu.gusdma, 3),
DEFINE_PROP_END_OF_LIST (),

2
hw/audio/pcspk.c
View File

@ -181,7 +181,7 @@ static void pcspk_realizefn(DeviceState *dev, Error **errp)
}
static Property pcspk_properties[] = {
DEFINE_PROP_HEX32("iobase", PCSpkState, iobase, -1),
DEFINE_PROP_UINT32("iobase", PCSpkState, iobase, -1),
DEFINE_PROP_PTR("pit", PCSpkState, pit),
DEFINE_PROP_END_OF_LIST(),
};

4
hw/audio/sb16.c
View File

@ -1399,8 +1399,8 @@ static int SB16_init (ISABus *bus)
}
static Property sb16_properties[] = {
DEFINE_PROP_HEX32 ("version", SB16State, ver, 0x0405), /* 4.5 */
DEFINE_PROP_HEX32 ("iobase", SB16State, port, 0x220),
DEFINE_PROP_UINT32 ("version", SB16State, ver, 0x0405), /* 4.5 */
DEFINE_PROP_UINT32 ("iobase", SB16State, port, 0x220),
DEFINE_PROP_UINT32 ("irq", SB16State, irq, 5),
DEFINE_PROP_UINT32 ("dma", SB16State, dma, 1),
DEFINE_PROP_UINT32 ("dma16", SB16State, hdma, 5),

33
hw/audio/wm8750.c
View File

@ -23,8 +23,12 @@ typedef struct {
int dac_hz;
} WMRate;
typedef struct {
I2CSlave i2c;
#define TYPE_WM8750 "wm8750"
#define WM8750(obj) OBJECT_CHECK(WM8750State, (obj), TYPE_WM8750)
typedef struct WM8750State {
I2CSlave parent_obj;
uint8_t i2c_data[2];
int i2c_len;
QEMUSoundCard card;
@ -256,7 +260,8 @@ static void wm8750_clk_update(WM8750State *s, int ext)
static void wm8750_reset(I2CSlave *i2c)
{
WM8750State *s = (WM8750State *) i2c;
WM8750State *s = WM8750(i2c);
s->rate = &wm_rate_table[0];
s->enable = 0;
wm8750_clk_update(s, 1);
@ -299,7 +304,7 @@ static void wm8750_reset(I2CSlave *i2c)
static void wm8750_event(I2CSlave *i2c, enum i2c_event event)
{
WM8750State *s = (WM8750State *) i2c;
WM8750State *s = WM8750(i2c);
switch (event) {
case I2C_START_SEND:
@ -356,7 +361,7 @@ static void wm8750_event(I2CSlave *i2c, enum i2c_event event)
static int wm8750_tx(I2CSlave *i2c, uint8_t data)
{
WM8750State *s = (WM8750State *) i2c;
WM8750State *s = WM8750(i2c);
uint8_t cmd;
uint16_t value;
@ -542,7 +547,7 @@ static int wm8750_tx(I2CSlave *i2c, uint8_t data)
break;
case WM8750_RESET: /* Reset */
wm8750_reset(&s->i2c);
wm8750_reset(I2C_SLAVE(s));
break;
#ifdef VERBOSE
@ -604,17 +609,17 @@ static const VMStateDescription vmstate_wm8750 = {
VMSTATE_UINT8(format, WM8750State),
VMSTATE_UINT8(power, WM8750State),
VMSTATE_UINT8(rate_vmstate, WM8750State),
VMSTATE_I2C_SLAVE(i2c, WM8750State),
VMSTATE_I2C_SLAVE(parent_obj, WM8750State),
VMSTATE_END_OF_LIST()
}
};
static int wm8750_init(I2CSlave *i2c)
{
WM8750State *s = FROM_I2C_SLAVE(WM8750State, i2c);
WM8750State *s = WM8750(i2c);
AUD_register_card(CODEC, &s->card);
wm8750_reset(&s->i2c);
wm8750_reset(I2C_SLAVE(s));
return 0;
}
@ -622,8 +627,9 @@ static int wm8750_init(I2CSlave *i2c)
#if 0
static void wm8750_fini(I2CSlave *i2c)
{
WM8750State *s = (WM8750State *) i2c;
wm8750_reset(&s->i2c);
WM8750State *s = WM8750(i2c);
wm8750_reset(I2C_SLAVE(s));
AUD_remove_card(&s->card);
g_free(s);
}
@ -632,7 +638,8 @@ static void wm8750_fini(I2CSlave *i2c)
void wm8750_data_req_set(DeviceState *dev,
void (*data_req)(void *, int, int), void *opaque)
{
WM8750State *s = FROM_I2C_SLAVE(WM8750State, I2C_SLAVE(dev));
WM8750State *s = WM8750(dev);
s->data_req = data_req;
s->opaque = opaque;
}
@ -702,7 +709,7 @@ static void wm8750_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo wm8750_info = {
.name = "wm8750",
.name = TYPE_WM8750,
.parent = TYPE_I2C_SLAVE,
.instance_size = sizeof(WM8750State),
.class_init = wm8750_class_init,

2
hw/block/fdc.c
View File

@ -2216,7 +2216,7 @@ static const VMStateDescription vmstate_isa_fdc ={
};
static Property isa_fdc_properties[] = {
DEFINE_PROP_HEX32("iobase", FDCtrlISABus, iobase, 0x3f0),
DEFINE_PROP_UINT32("iobase", FDCtrlISABus, iobase, 0x3f0),
DEFINE_PROP_UINT32("irq", FDCtrlISABus, irq, 6),
DEFINE_PROP_UINT32("dma", FDCtrlISABus, dma, 2),
DEFINE_PROP_DRIVE("driveA", FDCtrlISABus, state.drives[0].bs),

2
hw/block/nand.c
View File

@ -632,7 +632,7 @@ DeviceState *nand_init(BlockDriverState *bdrv, int manf_id, int chip_id)
if (nand_flash_ids[chip_id].size == 0) {
hw_error("%s: Unsupported NAND chip ID.\n", __FUNCTION__);
}
dev = qdev_create(NULL, "nand");
dev = DEVICE(object_new(TYPE_NAND));
qdev_prop_set_uint8(dev, "manufacturer_id", manf_id);
qdev_prop_set_uint8(dev, "chip_id", chip_id);
if (bdrv) {

2
hw/char/Makefile.objs
View File

@ -1,4 +1,4 @@
common-obj-$(CONFIG_IPACK) += tpci200.o ipoctal232.o ipack.o
common-obj-$(CONFIG_IPACK) += ipoctal232.o
common-obj-$(CONFIG_ESCC) += escc.o
common-obj-$(CONFIG_PARALLEL) += parallel.o
common-obj-$(CONFIG_PL011) += pl011.o

4
hw/char/debugcon.c
View File

@ -110,9 +110,9 @@ static void debugcon_isa_realizefn(DeviceState *dev, Error **errp)
}
static Property debugcon_isa_properties[] = {
DEFINE_PROP_HEX32("iobase", ISADebugconState, iobase, 0xe9),
DEFINE_PROP_UINT32("iobase", ISADebugconState, iobase, 0xe9),
DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr),
DEFINE_PROP_HEX32("readback", ISADebugconState, state.readback, 0xe9),
DEFINE_PROP_UINT32("readback", ISADebugconState, state.readback, 0xe9),
DEFINE_PROP_END_OF_LIST(),
};

20
hw/char/ipoctal232.c
View File

@ -8,7 +8,7 @@
* later version.
*/
#include "ipack.h"
#include "hw/ipack/ipack.h"
#include "qemu/bitops.h"
#include "sysemu/char.h"
@ -108,7 +108,8 @@ struct SCC2698Block {
};
struct IPOctalState {
IPackDevice dev;
IPackDevice parent_obj;
SCC2698Channel ch[N_CHANNELS];
SCC2698Block blk[N_BLOCKS];
uint8_t irq_vector;
@ -154,7 +155,7 @@ static const VMStateDescription vmstate_ipoctal = {
.minimum_version_id = 1,
.minimum_version_id_old = 1,
.fields = (VMStateField[]) {
VMSTATE_IPACK_DEVICE(dev, IPOctalState),
VMSTATE_IPACK_DEVICE(parent_obj, IPOctalState),
VMSTATE_STRUCT_ARRAY(ch, IPOctalState, N_CHANNELS, 1,
vmstate_scc2698_channel, SCC2698Channel),
VMSTATE_STRUCT_ARRAY(blk, IPOctalState, N_BLOCKS, 1,
@ -172,6 +173,7 @@ static const uint8_t id_prom_data[] = {
static void update_irq(IPOctalState *dev, unsigned block)
{
IPackDevice *idev = IPACK_DEVICE(dev);
/* Blocks A and B interrupt on INT0#, C and D on INT1#.
Thus, to get the status we have to check two blocks. */
SCC2698Block *blk0 = &dev->blk[block];
@ -179,9 +181,9 @@ static void update_irq(IPOctalState *dev, unsigned block)
unsigned intno = block / 2;
if ((blk0->isr & blk0->imr) || (blk1->isr & blk1->imr)) {
qemu_irq_raise(dev->dev.irq[intno]);
qemu_irq_raise(idev->irq[intno]);
} else {
qemu_irq_lower(dev->dev.irq[intno]);
qemu_irq_lower(idev->irq[intno]);
}
}
@ -534,9 +536,9 @@ static void hostdev_event(void *opaque, int event)
}
}
static int ipoctal_init(IPackDevice *ip)
static void ipoctal_realize(DeviceState *dev, Error **errp)
{
IPOctalState *s = IPOCTAL(ip);
IPOctalState *s = IPOCTAL(dev);
unsigned i;
for (i = 0; i < N_CHANNELS; i++) {
@ -552,8 +554,6 @@ static int ipoctal_init(IPackDevice *ip)
DPRINTF("Could not redirect channel %u, no chardev set\n", i);
}
}
return 0;
}
static Property ipoctal_properties[] = {
@ -573,7 +573,7 @@ static void ipoctal_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
IPackDeviceClass *ic = IPACK_DEVICE_CLASS(klass);
ic->init = ipoctal_init;
ic->realize = ipoctal_realize;
ic->io_read = io_read;
ic->io_write = io_write;
ic->id_read = id_read;

2
hw/char/parallel.c
View File

@ -595,7 +595,7 @@ bool parallel_mm_init(MemoryRegion *address_space,
static Property parallel_isa_properties[] = {
DEFINE_PROP_UINT32("index", ISAParallelState, index, -1),
DEFINE_PROP_HEX32("iobase", ISAParallelState, iobase, -1),
DEFINE_PROP_UINT32("iobase", ISAParallelState, iobase, -1),
DEFINE_PROP_UINT32("irq", ISAParallelState, isairq, 7),
DEFINE_PROP_CHR("chardev", ISAParallelState, state.chr),
DEFINE_PROP_END_OF_LIST(),

2
hw/char/serial-isa.c
View File

@ -88,7 +88,7 @@ static const VMStateDescription vmstate_isa_serial = {
static Property serial_isa_properties[] = {
DEFINE_PROP_UINT32("index", ISASerialState, index, -1),
DEFINE_PROP_HEX32("iobase", ISASerialState, iobase, -1),
DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1),
DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1),
DEFINE_PROP_CHR("chardev", ISASerialState, state.chr),
DEFINE_PROP_UINT32("wakeup", ISASerialState, state.wakeup, 0),

12
hw/core/qdev-properties-system.c
View File

@ -109,7 +109,8 @@ static void set_drive(Object *obj, Visitor *v, void *opaque,
}
PropertyInfo qdev_prop_drive = {
.name = "drive",
.name = "str",
.legacy_name = "drive",
.get = get_drive,
.set = set_drive,
.release = release_drive,
@ -164,7 +165,8 @@ static void set_chr(Object *obj, Visitor *v, void *opaque,
}
PropertyInfo qdev_prop_chr = {
.name = "chr",
.name = "str",
.legacy_name = "chr",
.get = get_chr,
.set = set_chr,
.release = release_chr,
@ -242,7 +244,8 @@ static void set_netdev(Object *obj, Visitor *v, void *opaque,
}
PropertyInfo qdev_prop_netdev = {
.name = "netdev",
.name = "str",
.legacy_name = "netdev",
.get = get_netdev,
.set = set_netdev,
};
@ -321,7 +324,8 @@ static void set_vlan(Object *obj, Visitor *v, void *opaque,
}
PropertyInfo qdev_prop_vlan = {
.name = "vlan",
.name = "int32",
.legacy_name = "vlan",
.print = print_vlan,
.get = get_vlan,
.set = set_vlan,

204
hw/core/qdev-properties.c
View File

@ -74,13 +74,6 @@ static void bit_prop_set(DeviceState *dev, Property *props, bool val)
}
}
static int prop_print_bit(DeviceState *dev, Property *prop, char *dest,
size_t len)
{
uint32_t *p = qdev_get_prop_ptr(dev, prop);
return snprintf(dest, len, (*p & qdev_get_prop_mask(prop)) ? "on" : "off");
}
static void prop_get_bit(Object *obj, Visitor *v, void *opaque,
const char *name, Error **errp)
{
@ -114,9 +107,8 @@ static void prop_set_bit(Object *obj, Visitor *v, void *opaque,
}
PropertyInfo qdev_prop_bit = {
.name = "boolean",
.name = "bool",
.legacy_name = "on/off",
.print = prop_print_bit,
.get = prop_get_bit,
.set = prop_set_bit,
};
@ -149,7 +141,7 @@ static void set_bool(Object *obj, Visitor *v, void *opaque,
}
PropertyInfo qdev_prop_bool = {
.name = "boolean",
.name = "bool",
.get = get_bool,
.set = set_bool,
};
@ -187,40 +179,6 @@ PropertyInfo qdev_prop_uint8 = {
.set = set_uint8,
};
/* --- 8bit hex value --- */
static int parse_hex8(DeviceState *dev, Property *prop, const char *str)
{
uint8_t *ptr = qdev_get_prop_ptr(dev, prop);
char *end;
if (str[0] != '0' || str[1] != 'x') {
return -EINVAL;
}
*ptr = strtoul(str, &end, 16);
if ((*end != '\0') || (end == str)) {
return -EINVAL;
}
return 0;
}
static int print_hex8(DeviceState *dev, Property *prop, char *dest, size_t len)
{
uint8_t *ptr = qdev_get_prop_ptr(dev, prop);
return snprintf(dest, len, "0x%" PRIx8, *ptr);
}
PropertyInfo qdev_prop_hex8 = {
.name = "uint8",
.legacy_name = "hex8",
.parse = parse_hex8,
.print = print_hex8,
.get = get_uint8,
.set = set_uint8,
};
/* --- 16bit integer --- */
static void get_uint16(Object *obj, Visitor *v, void *opaque,
@ -318,40 +276,6 @@ PropertyInfo qdev_prop_int32 = {
.set = set_int32,
};
/* --- 32bit hex value --- */
static int parse_hex32(DeviceState *dev, Property *prop, const char *str)
{
uint32_t *ptr = qdev_get_prop_ptr(dev, prop);
char *end;
if (str[0] != '0' || str[1] != 'x') {
return -EINVAL;
}
*ptr = strtoul(str, &end, 16);
if ((*end != '\0') || (end == str)) {
return -EINVAL;
}
return 0;
}
static int print_hex32(DeviceState *dev, Property *prop, char *dest, size_t len)
{
uint32_t *ptr = qdev_get_prop_ptr(dev, prop);
return snprintf(dest, len, "0x%" PRIx32, *ptr);
}
PropertyInfo qdev_prop_hex32 = {
.name = "uint32",
.legacy_name = "hex32",
.parse = parse_hex32,
.print = print_hex32,
.get = get_uint32,
.set = set_uint32,
};
/* --- 64bit integer --- */
static void get_uint64(Object *obj, Visitor *v, void *opaque,
@ -385,40 +309,6 @@ PropertyInfo qdev_prop_uint64 = {
.set = set_uint64,
};
/* --- 64bit hex value --- */
static int parse_hex64(DeviceState *dev, Property *prop, const char *str)
{
uint64_t *ptr = qdev_get_prop_ptr(dev, prop);
char *end;
if (str[0] != '0' || str[1] != 'x') {
return -EINVAL;
}
*ptr = strtoull(str, &end, 16);
if ((*end != '\0') || (end == str)) {
return -EINVAL;
}
return 0;
}
static int print_hex64(DeviceState *dev, Property *prop, char *dest, size_t len)
{
uint64_t *ptr = qdev_get_prop_ptr(dev, prop);
return snprintf(dest, len, "0x%" PRIx64, *ptr);
}
PropertyInfo qdev_prop_hex64 = {
.name = "uint64",
.legacy_name = "hex64",
.parse = parse_hex64,
.print = print_hex64,
.get = get_uint64,
.set = set_uint64,
};
/* --- string --- */
static void release_string(Object *obj, const char *name, void *opaque)
@ -427,16 +317,6 @@ static void release_string(Object *obj, const char *name, void *opaque)
g_free(*(char **)qdev_get_prop_ptr(DEVICE(obj), prop));
}
static int print_string(DeviceState *dev, Property *prop, char *dest,
size_t len)
{
char **ptr = qdev_get_prop_ptr(dev, prop);
if (!*ptr) {
return snprintf(dest, len, "<null>");
}
return snprintf(dest, len, "\"%s\"", *ptr);
}
static void get_string(Object *obj, Visitor *v, void *opaque,
const char *name, Error **errp)
{
@ -478,8 +358,7 @@ static void set_string(Object *obj, Visitor *v, void *opaque,
}
PropertyInfo qdev_prop_string = {
.name = "string",
.print = print_string,
.name = "str",
.release = release_string,
.get = get_string,
.set = set_string,
@ -563,41 +442,31 @@ inval:
}
PropertyInfo qdev_prop_macaddr = {
.name = "macaddr",
.name = "str",
.legacy_name = "macaddr",
.get = get_mac,
.set = set_mac,
};
/* --- lost tick policy --- */
static const char *lost_tick_policy_table[LOST_TICK_MAX+1] = {
[LOST_TICK_DISCARD] = "discard",
[LOST_TICK_DELAY] = "delay",
[LOST_TICK_MERGE] = "merge",
[LOST_TICK_SLEW] = "slew",
[LOST_TICK_MAX] = NULL,
};
QEMU_BUILD_BUG_ON(sizeof(LostTickPolicy) != sizeof(int));
PropertyInfo qdev_prop_losttickpolicy = {
.name = "LostTickPolicy",
.enum_table = lost_tick_policy_table,
.enum_table = LostTickPolicy_lookup,
.get = get_enum,
.set = set_enum,
};
/* --- BIOS CHS translation */
static const char *bios_chs_trans_table[] = {
[BIOS_ATA_TRANSLATION_AUTO] = "auto",
[BIOS_ATA_TRANSLATION_NONE] = "none",
[BIOS_ATA_TRANSLATION_LBA] = "lba",
};
QEMU_BUILD_BUG_ON(sizeof(BiosAtaTranslation) != sizeof(int));
PropertyInfo qdev_prop_bios_chs_trans = {
.name = "bios-chs-trans",
.enum_table = bios_chs_trans_table,
.name = "BiosAtaTranslation",
.legacy_name = "bios-chs-trans",
.enum_table = BiosAtaTranslation_lookup,
.get = get_enum,
.set = set_enum,
};
@ -715,7 +584,8 @@ static void set_blocksize(Object *obj, Visitor *v, void *opaque,
}
PropertyInfo qdev_prop_blocksize = {
.name = "blocksize",
.name = "uint16",
.legacy_name = "blocksize",
.get = get_uint16,
.set = set_blocksize,
};
@ -822,7 +692,8 @@ inval:
}
PropertyInfo qdev_prop_pci_host_devaddr = {
.name = "pci-host-devaddr",
.name = "str",
.legacy_name = "pci-host-devaddr",
.get = get_pci_host_devaddr,
.set = set_pci_host_devaddr,
};
@ -987,20 +858,6 @@ void error_set_from_qdev_prop_error(Error **errp, int ret, DeviceState *dev,
}
}
void qdev_prop_parse(DeviceState *dev, const char *name, const char *value,
Error **errp)
{
char *legacy_name;
legacy_name = g_strdup_printf("legacy-%s", name);
if (object_property_get_type(OBJECT(dev), legacy_name, NULL)) {
object_property_parse(OBJECT(dev), value, legacy_name, errp);
} else {
object_property_parse(OBJECT(dev), value, name, errp);
}
g_free(legacy_name);
}
void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value)
{
object_property_set_bool(OBJECT(dev), value, name, &error_abort);
@ -1093,7 +950,7 @@ void qdev_prop_set_globals_for_type(DeviceState *dev, const char *typename,
if (strcmp(typename, prop->driver) != 0) {
continue;
}
qdev_prop_parse(dev, prop->property, prop->value, &err);
object_property_parse(OBJECT(dev), prop->value, prop->property, &err);
if (err != NULL) {
error_propagate(errp, err);
return;
@ -1140,39 +997,8 @@ static void set_size(Object *obj, Visitor *v, void *opaque,
visit_type_size(v, ptr, name, errp);
}
static int parse_size(DeviceState *dev, Property *prop, const char *str)
{
uint64_t *ptr = qdev_get_prop_ptr(dev, prop);
if (str != NULL) {
parse_option_size(prop->name, str, ptr, &error_abort);
}
return 0;
}
static int print_size(DeviceState *dev, Property *prop, char *dest, size_t len)
{
static const char suffixes[] = { 'B', 'K', 'M', 'G', 'T' };
uint64_t div, val = *(uint64_t *)qdev_get_prop_ptr(dev, prop);
int i;
/* Compute floor(log2(val)). */
i = 64 - clz64(val);
/* Find the power of 1024 that we'll display as the units. */
i /= 10;
if (i >= ARRAY_SIZE(suffixes)) {
i = ARRAY_SIZE(suffixes) - 1;
}
div = 1ULL << (i * 10);
return snprintf(dest, len, "%0.03f%c", (double)val/div, suffixes[i]);
}
PropertyInfo qdev_prop_size = {
.name = "size",
.parse = parse_size,
.print = print_size,
.get = get_size,
.set = set_size,
};

38
hw/core/qdev.c
View File

@ -588,31 +588,6 @@ static void qdev_get_legacy_property(Object *obj, Visitor *v, void *opaque,
visit_type_str(v, &ptr, name, errp);
}
static void qdev_set_legacy_property(Object *obj, Visitor *v, void *opaque,
const char *name, Error **errp)
{
DeviceState *dev = DEVICE(obj);
Property *prop = opaque;
Error *local_err = NULL;
char *ptr = NULL;
int ret;
if (dev->realized) {
qdev_prop_set_after_realize(dev, name, errp);
return;
}
visit_type_str(v, &ptr, name, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
ret = prop->info->parse(dev, prop, ptr);
error_set_from_qdev_prop_error(errp, ret, dev, prop, ptr);
g_free(ptr);
}
/**
* @qdev_add_legacy_property - adds a legacy property
*
@ -625,25 +600,20 @@ static void qdev_set_legacy_property(Object *obj, Visitor *v, void *opaque,
void qdev_property_add_legacy(DeviceState *dev, Property *prop,
Error **errp)
{
gchar *name, *type;
gchar *name;
/* Register pointer properties as legacy properties */
if (!prop->info->print && !prop->info->parse &&
(prop->info->set || prop->info->get)) {
if (!prop->info->print && prop->info->get) {
return;
}
name = g_strdup_printf("legacy-%s", prop->name);
type = g_strdup_printf("legacy<%s>",
prop->info->legacy_name ?: prop->info->name);
object_property_add(OBJECT(dev), name, type,
object_property_add(OBJECT(dev), name, "str",
prop->info->print ? qdev_get_legacy_property : prop->info->get,
prop->info->parse ? qdev_set_legacy_property : prop->info->set,
NULL,
NULL,
prop, errp);
g_free(type);
g_free(name);
}

2
hw/display/g364fb.c
View File

@ -524,7 +524,7 @@ static void g364fb_sysbus_reset(DeviceState *d)
}
static Property g364fb_sysbus_properties[] = {
DEFINE_PROP_HEX32("vram_size", G364SysBusState, g364.vram_size,
DEFINE_PROP_UINT32("vram_size", G364SysBusState, g364.vram_size,
8 * 1024 * 1024),
DEFINE_PROP_END_OF_LIST(),
};

18
hw/display/ssd0303.c
View File

@ -41,8 +41,12 @@ enum ssd0303_cmd {
SSD0303_CMD_SKIP1
};
#define TYPE_SSD0303 "ssd0303"
#define SSD0303(obj) OBJECT_CHECK(ssd0303_state, (obj), TYPE_SSD0303)
typedef struct {
I2CSlave i2c;
I2CSlave parent_obj;
QemuConsole *con;
int row;
int col;
@ -65,8 +69,9 @@ static int ssd0303_recv(I2CSlave *i2c)
static int ssd0303_send(I2CSlave *i2c, uint8_t data)
{
ssd0303_state *s = (ssd0303_state *)i2c;
ssd0303_state *s = SSD0303(i2c);
enum ssd0303_cmd old_cmd_state;
switch (s->mode) {
case SSD0303_IDLE:
DPRINTF("byte 0x%02x\n", data);
@ -175,7 +180,8 @@ static int ssd0303_send(I2CSlave *i2c, uint8_t data)
static void ssd0303_event(I2CSlave *i2c, enum i2c_event event)
{
ssd0303_state *s = (ssd0303_state *)i2c;
ssd0303_state *s = SSD0303(i2c);
switch (event) {
case I2C_FINISH:
s->mode = SSD0303_IDLE;
@ -279,7 +285,7 @@ static const VMStateDescription vmstate_ssd0303 = {
VMSTATE_UINT32(mode, ssd0303_state),
VMSTATE_UINT32(cmd_state, ssd0303_state),
VMSTATE_BUFFER(framebuffer, ssd0303_state),
VMSTATE_I2C_SLAVE(i2c, ssd0303_state),
VMSTATE_I2C_SLAVE(parent_obj, ssd0303_state),
VMSTATE_END_OF_LIST()
}
};
@ -291,7 +297,7 @@ static const GraphicHwOps ssd0303_ops = {
static int ssd0303_init(I2CSlave *i2c)
{
ssd0303_state *s = FROM_I2C_SLAVE(ssd0303_state, i2c);
ssd0303_state *s = SSD0303(i2c);
s->con = graphic_console_init(DEVICE(i2c), &ssd0303_ops, s);
qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY);
@ -311,7 +317,7 @@ static void ssd0303_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo ssd0303_info = {
.name = "ssd0303",
.name = TYPE_SSD0303,
.parent = TYPE_I2C_SLAVE,
.instance_size = sizeof(ssd0303_state),
.class_init = ssd0303_class_init,

4
hw/display/tcx.c
View File

@ -617,11 +617,11 @@ static int tcx_init1(SysBusDevice *dev)
}
static Property tcx_properties[] = {
DEFINE_PROP_HEX32("vram_size", TCXState, vram_size, -1),
DEFINE_PROP_UINT32("vram_size", TCXState, vram_size, -1),
DEFINE_PROP_UINT16("width", TCXState, width, -1),
DEFINE_PROP_UINT16("height", TCXState, height, -1),
DEFINE_PROP_UINT16("depth", TCXState, depth, -1),
DEFINE_PROP_HEX64("prom_addr", TCXState, prom_addr, -1),
DEFINE_PROP_UINT64("prom_addr", TCXState, prom_addr, -1),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/dma/i82374.c
View File

@ -149,7 +149,7 @@ static void i82374_isa_realize(DeviceState *dev, Error **errp)
}
static Property i82374_properties[] = {
DEFINE_PROP_HEX32("iobase", ISAi82374State, iobase, 0x400),
DEFINE_PROP_UINT32("iobase", ISAi82374State, iobase, 0x400),
DEFINE_PROP_END_OF_LIST()
};

2
hw/dma/sun4m_iommu.c
View File

@ -362,7 +362,7 @@ static int iommu_init1(SysBusDevice *dev)
}
static Property iommu_properties[] = {
DEFINE_PROP_HEX32("version", IOMMUState, version, 0),
DEFINE_PROP_UINT32("version", IOMMUState, version, 0),
DEFINE_PROP_END_OF_LIST(),
};

23
hw/gpio/max7310.c
View File

@ -9,8 +9,12 @@
#include "hw/i2c/i2c.h"
typedef struct {
I2CSlave i2c;
#define TYPE_MAX7310 "max7310"
#define MAX7310(obj) OBJECT_CHECK(MAX7310State, (obj), TYPE_MAX7310)
typedef struct MAX7310State {
I2CSlave parent_obj;
int i2c_command_byte;
int len;
@ -25,7 +29,8 @@ typedef struct {
static void max7310_reset(DeviceState *dev)
{
MAX7310State *s = FROM_I2C_SLAVE(MAX7310State, I2C_SLAVE(dev));
MAX7310State *s = MAX7310(dev);
s->level &= s->direction;
s->direction = 0xff;
s->polarity = 0xf0;
@ -35,7 +40,7 @@ static void max7310_reset(DeviceState *dev)
static int max7310_rx(I2CSlave *i2c)
{
MAX7310State *s = (MAX7310State *) i2c;
MAX7310State *s = MAX7310(i2c);
switch (s->command) {
case 0x00: /* Input port */
@ -70,7 +75,7 @@ static int max7310_rx(I2CSlave *i2c)
static int max7310_tx(I2CSlave *i2c, uint8_t data)
{
MAX7310State *s = (MAX7310State *) i2c;
MAX7310State *s = MAX7310(i2c);
uint8_t diff;
int line;
@ -125,7 +130,7 @@ static int max7310_tx(I2CSlave *i2c, uint8_t data)
static void max7310_event(I2CSlave *i2c, enum i2c_event event)
{
MAX7310State *s = (MAX7310State *) i2c;
MAX7310State *s = MAX7310(i2c);
s->len = 0;
switch (event) {
@ -156,7 +161,7 @@ static const VMStateDescription vmstate_max7310 = {
VMSTATE_UINT8(polarity, MAX7310State),
VMSTATE_UINT8(status, MAX7310State),
VMSTATE_UINT8(command, MAX7310State),
VMSTATE_I2C_SLAVE(i2c, MAX7310State),
VMSTATE_I2C_SLAVE(parent_obj, MAX7310State),
VMSTATE_END_OF_LIST()
}
};
@ -177,7 +182,7 @@ static void max7310_gpio_set(void *opaque, int line, int level)
* but also accepts sequences that are not SMBus so return an I2C device. */
static int max7310_init(I2CSlave *i2c)
{
MAX7310State *s = FROM_I2C_SLAVE(MAX7310State, i2c);
MAX7310State *s = MAX7310(i2c);
qdev_init_gpio_in(&i2c->qdev, max7310_gpio_set, 8);
qdev_init_gpio_out(&i2c->qdev, s->handler, 8);
@ -199,7 +204,7 @@ static void max7310_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo max7310_info = {
.name = "max7310",
.name = TYPE_MAX7310,
.parent = TYPE_I2C_SLAVE,
.instance_size = sizeof(MAX7310State),
.class_init = max7310_class_init,

6
hw/i2c/bitbang_i2c.c
View File

@ -46,7 +46,7 @@ typedef enum bitbang_i2c_state {
} bitbang_i2c_state;
struct bitbang_i2c_interface {
i2c_bus *bus;
I2CBus *bus;
bitbang_i2c_state state;
int last_data;
int last_clock;
@ -170,7 +170,7 @@ int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level)
abort();
}
bitbang_i2c_interface *bitbang_i2c_init(i2c_bus *bus)
bitbang_i2c_interface *bitbang_i2c_init(I2CBus *bus)
{
bitbang_i2c_interface *s;
@ -213,7 +213,7 @@ static int gpio_i2c_init(SysBusDevice *sbd)
{
DeviceState *dev = DEVICE(sbd);
GPIOI2CState *s = GPIO_I2C(dev);
i2c_bus *bus;
I2CBus *bus;
memory_region_init(&s->dummy_iomem, OBJECT(s), "gpio_i2c", 0);
sysbus_init_mmio(sbd, &s->dummy_iomem);

2
hw/i2c/bitbang_i2c.h
View File

@ -8,7 +8,7 @@ typedef struct bitbang_i2c_interface bitbang_i2c_interface;
#define BITBANG_I2C_SDA 0
#define BITBANG_I2C_SCL 1
bitbang_i2c_interface *bitbang_i2c_init(i2c_bus *bus);
bitbang_i2c_interface *bitbang_i2c_init(I2CBus *bus);
int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level);
#endif

32
hw/i2c/core.c
View File

@ -9,7 +9,7 @@
#include "hw/i2c/i2c.h"
struct i2c_bus
struct I2CBus
{
BusState qbus;
I2CSlave *current_dev;
@ -23,24 +23,24 @@ static Property i2c_props[] = {
};
#define TYPE_I2C_BUS "i2c-bus"
#define I2C_BUS(obj) OBJECT_CHECK(i2c_bus, (obj), TYPE_I2C_BUS)
#define I2C_BUS(obj) OBJECT_CHECK(I2CBus, (obj), TYPE_I2C_BUS)
static const TypeInfo i2c_bus_info = {
.name = TYPE_I2C_BUS,
.parent = TYPE_BUS,
.instance_size = sizeof(i2c_bus),
.instance_size = sizeof(I2CBus),
};
static void i2c_bus_pre_save(void *opaque)
{
i2c_bus *bus = opaque;
I2CBus *bus = opaque;
bus->saved_address = bus->current_dev ? bus->current_dev->address : -1;
}
static int i2c_bus_post_load(void *opaque, int version_id)
{
i2c_bus *bus = opaque;
I2CBus *bus = opaque;
/* The bus is loaded before attached devices, so load and save the
current device id. Devices will check themselves as loaded. */
@ -56,15 +56,15 @@ static const VMStateDescription vmstate_i2c_bus = {
.pre_save = i2c_bus_pre_save,
.post_load = i2c_bus_post_load,
.fields = (VMStateField []) {
VMSTATE_UINT8(saved_address, i2c_bus),
VMSTATE_UINT8(saved_address, I2CBus),
VMSTATE_END_OF_LIST()
}
};
/* Create a new I2C bus. */
i2c_bus *i2c_init_bus(DeviceState *parent, const char *name)
I2CBus *i2c_init_bus(DeviceState *parent, const char *name)
{
i2c_bus *bus;
I2CBus *bus;
bus = I2C_BUS(qbus_create(TYPE_I2C_BUS, parent, name));
vmstate_register(NULL, -1, &vmstate_i2c_bus, bus);
@ -77,14 +77,14 @@ void i2c_set_slave_address(I2CSlave *dev, uint8_t address)
}
/* Return nonzero if bus is busy. */
int i2c_bus_busy(i2c_bus *bus)
int i2c_bus_busy(I2CBus *bus)
{
return bus->current_dev != NULL;
}
/* Returns non-zero if the address is not valid. */
/* TODO: Make this handle multiple masters. */
int i2c_start_transfer(i2c_bus *bus, uint8_t address, int recv)
int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv)
{
BusChild *kid;
I2CSlave *slave = NULL;
@ -113,7 +113,7 @@ int i2c_start_transfer(i2c_bus *bus, uint8_t address, int recv)
return 0;
}
void i2c_end_transfer(i2c_bus *bus)
void i2c_end_transfer(I2CBus *bus)
{
I2CSlave *dev = bus->current_dev;
I2CSlaveClass *sc;
@ -130,7 +130,7 @@ void i2c_end_transfer(i2c_bus *bus)
bus->current_dev = NULL;
}
int i2c_send(i2c_bus *bus, uint8_t data)
int i2c_send(I2CBus *bus, uint8_t data)
{
I2CSlave *dev = bus->current_dev;
I2CSlaveClass *sc;
@ -147,7 +147,7 @@ int i2c_send(i2c_bus *bus, uint8_t data)
return -1;
}
int i2c_recv(i2c_bus *bus)
int i2c_recv(I2CBus *bus)
{
I2CSlave *dev = bus->current_dev;
I2CSlaveClass *sc;
@ -164,7 +164,7 @@ int i2c_recv(i2c_bus *bus)
return -1;
}
void i2c_nack(i2c_bus *bus)
void i2c_nack(I2CBus *bus)
{
I2CSlave *dev = bus->current_dev;
I2CSlaveClass *sc;
@ -182,7 +182,7 @@ void i2c_nack(i2c_bus *bus)
static int i2c_slave_post_load(void *opaque, int version_id)
{
I2CSlave *dev = opaque;
i2c_bus *bus;
I2CBus *bus;
bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev)));
if (bus->saved_address == dev->address) {
bus->current_dev = dev;
@ -210,7 +210,7 @@ static int i2c_slave_qdev_init(DeviceState *dev)
return sc->init(s);
}
DeviceState *i2c_create_slave(i2c_bus *bus, const char *name, uint8_t addr)
DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr)
{
DeviceState *dev;

2
hw/i2c/exynos4210_i2c.c
View File

@ -83,7 +83,7 @@ typedef struct Exynos4210I2CState {
SysBusDevice parent_obj;
MemoryRegion iomem;
i2c_bus *bus;
I2CBus *bus;
qemu_irq irq;
uint8_t i2ccon;

4
hw/i2c/omap_i2c.c
View File

@ -30,7 +30,7 @@ typedef struct OMAPI2CState {
MemoryRegion iomem;
qemu_irq irq;
qemu_irq drq[2];
i2c_bus *bus;
I2CBus *bus;
uint8_t revision;
void *iclk;
@ -491,7 +491,7 @@ static void omap_i2c_register_types(void)
type_register_static(&omap_i2c_info);
}
i2c_bus *omap_i2c_bus(DeviceState *omap_i2c)
I2CBus *omap_i2c_bus(DeviceState *omap_i2c)
{
OMAPI2CState *s = OMAP_I2C(omap_i2c);
return s->bus;

2
hw/i2c/pm_smbus.c
View File

@ -59,7 +59,7 @@ static void smb_transaction(PMSMBus *s)
uint8_t read = s->smb_addr & 0x01;
uint8_t cmd = s->smb_cmd;
uint8_t addr = s->smb_addr >> 1;
i2c_bus *bus = s->smbus;
I2CBus *bus = s->smbus;
SMBUS_DPRINTF("SMBus trans addr=0x%02x prot=0x%02x\n", addr, prot);
/* Transaction isn't exec if STS_DEV_ERR bit set */

18
hw/i2c/smbus.c
View File

@ -208,13 +208,13 @@ static int smbus_device_init(I2CSlave *i2c)
}
/* Master device commands. */
void smbus_quick_command(i2c_bus *bus, uint8_t addr, int read)
void smbus_quick_command(I2CBus *bus, uint8_t addr, int read)
{
i2c_start_transfer(bus, addr, read);
i2c_end_transfer(bus);
}
uint8_t smbus_receive_byte(i2c_bus *bus, uint8_t addr)
uint8_t smbus_receive_byte(I2CBus *bus, uint8_t addr)
{
uint8_t data;
@ -225,14 +225,14 @@ uint8_t smbus_receive_byte(i2c_bus *bus, uint8_t addr)
return data;
}
void smbus_send_byte(i2c_bus *bus, uint8_t addr, uint8_t data)
void smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data)
{
i2c_start_transfer(bus, addr, 0);
i2c_send(bus, data);
i2c_end_transfer(bus);
}
uint8_t smbus_read_byte(i2c_bus *bus, uint8_t addr, uint8_t command)
uint8_t smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command)
{
uint8_t data;
i2c_start_transfer(bus, addr, 0);
@ -244,7 +244,7 @@ uint8_t smbus_read_byte(i2c_bus *bus, uint8_t addr, uint8_t command)
return data;
}
void smbus_write_byte(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t data)
void smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data)
{
i2c_start_transfer(bus, addr, 0);
i2c_send(bus, command);
@ -252,7 +252,7 @@ void smbus_write_byte(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t data)
i2c_end_transfer(bus);
}
uint16_t smbus_read_word(i2c_bus *bus, uint8_t addr, uint8_t command)
uint16_t smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command)
{
uint16_t data;
i2c_start_transfer(bus, addr, 0);
@ -265,7 +265,7 @@ uint16_t smbus_read_word(i2c_bus *bus, uint8_t addr, uint8_t command)
return data;
}
void smbus_write_word(i2c_bus *bus, uint8_t addr, uint8_t command, uint16_t data)
void smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data)
{
i2c_start_transfer(bus, addr, 0);
i2c_send(bus, command);
@ -274,7 +274,7 @@ void smbus_write_word(i2c_bus *bus, uint8_t addr, uint8_t command, uint16_t data
i2c_end_transfer(bus);
}
int smbus_read_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data)
int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data)
{
int len;
int i;
@ -292,7 +292,7 @@ int smbus_read_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data)
return len;
}
void smbus_write_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data,
void smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
int len)
{
int i;

2
hw/i2c/smbus_eeprom.c
View File

@ -139,7 +139,7 @@ static void smbus_eeprom_register_types(void)
type_init(smbus_eeprom_register_types)
void smbus_eeprom_init(i2c_bus *smbus, int nb_eeprom,
void smbus_eeprom_init(I2CBus *smbus, int nb_eeprom,
const uint8_t *eeprom_spd, int eeprom_spd_size)
{
int i;

2
hw/i2c/smbus_ich9.c
View File

@ -108,7 +108,7 @@ static void ich9_smb_class_init(ObjectClass *klass, void *data)
dc->cannot_instantiate_with_device_add_yet = true;
}
i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
{
PCIDevice *d =
pci_create_simple_multifunction(bus, devfn, true, TYPE_ICH9_SMB_DEVICE);

2
hw/i2c/versatile_i2c.c
View File

@ -81,7 +81,7 @@ static int versatile_i2c_init(SysBusDevice *sbd)
{
DeviceState *dev = DEVICE(sbd);
VersatileI2CState *s = VERSATILE_I2C(dev);
i2c_bus *bus;
I2CBus *bus;
bus = i2c_init_bus(dev, "i2c");
s->bitbang = bitbang_i2c_init(bus);

8
hw/i386/kvm/i8254.c
View File

@ -268,9 +268,9 @@ static void kvm_pit_realizefn(DeviceState *dev, Error **errp)
return;
}
switch (s->lost_tick_policy) {
case LOST_TICK_DELAY:
case LOST_TICK_POLICY_DELAY:
break; /* enabled by default */
case LOST_TICK_DISCARD:
case LOST_TICK_POLICY_DISCARD:
if (kvm_check_extension(kvm_state, KVM_CAP_REINJECT_CONTROL)) {
struct kvm_reinject_control control = { .pit_reinject = 0 };
@ -298,9 +298,9 @@ static void kvm_pit_realizefn(DeviceState *dev, Error **errp)
}
static Property kvm_pit_properties[] = {
DEFINE_PROP_HEX32("iobase", PITCommonState, iobase, -1),
DEFINE_PROP_UINT32("iobase", PITCommonState, iobase, -1),
DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", KVMPITState,
lost_tick_policy, LOST_TICK_DELAY),
lost_tick_policy, LOST_TICK_POLICY_DELAY),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/i386/pc_piix.c
View File

@ -236,7 +236,7 @@ static void pc_init1(QEMUMachineInitArgs *args,
}
if (pci_enabled && acpi_enabled) {
i2c_bus *smbus;
I2CBus *smbus;
smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
/* TODO: Populate SPD eeprom data. */

4
hw/ide/isa.c
View File

@ -104,8 +104,8 @@ ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, int isairq,
}
static Property isa_ide_properties[] = {
DEFINE_PROP_HEX32("iobase", ISAIDEState, iobase, 0x1f0),
DEFINE_PROP_HEX32("iobase2", ISAIDEState, iobase2, 0x3f6),
DEFINE_PROP_UINT32("iobase", ISAIDEState, iobase, 0x1f0),
DEFINE_PROP_UINT32("iobase2", ISAIDEState, iobase2, 0x3f6),
DEFINE_PROP_UINT32("irq", ISAIDEState, isairq, 14),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/ide/qdev.c
View File

@ -206,7 +206,7 @@ static int ide_drive_initfn(IDEDevice *dev)
#define DEFINE_IDE_DEV_PROPERTIES() \
DEFINE_BLOCK_PROPERTIES(IDEDrive, dev.conf), \
DEFINE_PROP_STRING("ver", IDEDrive, dev.version), \
DEFINE_PROP_HEX64("wwn", IDEDrive, dev.wwn, 0), \
DEFINE_PROP_UINT64("wwn", IDEDrive, dev.wwn, 0), \
DEFINE_PROP_STRING("serial", IDEDrive, dev.serial),\
DEFINE_PROP_STRING("model", IDEDrive, dev.model)

22
hw/input/lm832x.c
View File

@ -23,8 +23,12 @@
#include "qemu/timer.h"
#include "ui/console.h"
#define TYPE_LM8323 "lm8323"
#define LM8323(obj) OBJECT_CHECK(LM823KbdState, (obj), TYPE_LM8323)
typedef struct {
I2CSlave i2c;
I2CSlave parent_obj;
uint8_t i2c_dir;
uint8_t i2c_cycle;
uint8_t reg;
@ -380,7 +384,7 @@ static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value)
static void lm_i2c_event(I2CSlave *i2c, enum i2c_event event)
{
LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);
LM823KbdState *s = LM8323(i2c);
switch (event) {
case I2C_START_RECV:
@ -396,14 +400,14 @@ static void lm_i2c_event(I2CSlave *i2c, enum i2c_event event)
static int lm_i2c_rx(I2CSlave *i2c)
{
LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);
LM823KbdState *s = LM8323(i2c);
return lm_kbd_read(s, s->reg, s->i2c_cycle ++);
}
static int lm_i2c_tx(I2CSlave *i2c, uint8_t data)
{
LM823KbdState *s = (LM823KbdState *) i2c;
LM823KbdState *s = LM8323(i2c);
if (!s->i2c_cycle)
s->reg = data;
@ -431,7 +435,7 @@ static const VMStateDescription vmstate_lm_kbd = {
.minimum_version_id_old = 0,
.post_load = lm_kbd_post_load,
.fields = (VMStateField []) {
VMSTATE_I2C_SLAVE(i2c, LM823KbdState),
VMSTATE_I2C_SLAVE(parent_obj, LM823KbdState),
VMSTATE_UINT8(i2c_dir, LM823KbdState),
VMSTATE_UINT8(i2c_cycle, LM823KbdState),
VMSTATE_UINT8(reg, LM823KbdState),
@ -460,13 +464,13 @@ static const VMStateDescription vmstate_lm_kbd = {
static int lm8323_init(I2CSlave *i2c)
{
LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);
LM823KbdState *s = LM8323(i2c);
s->model = 0x8323;
s->pwm.tm[0] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm0_tick, s);
s->pwm.tm[1] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm1_tick, s);
s->pwm.tm[2] = timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm2_tick, s);
qdev_init_gpio_out(&i2c->qdev, &s->nirq, 1);
qdev_init_gpio_out(DEVICE(i2c), &s->nirq, 1);
lm_kbd_reset(s);
@ -476,7 +480,7 @@ static int lm8323_init(I2CSlave *i2c)
void lm832x_key_event(DeviceState *dev, int key, int state)
{
LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, I2C_SLAVE(dev));
LM823KbdState *s = LM8323(dev);
if ((s->status & INT_ERROR) && (s->error & ERR_FIFOOVR))
return;
@ -507,7 +511,7 @@ static void lm8323_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo lm8323_info = {
.name = "lm8323",
.name = TYPE_LM8323,
.parent = TYPE_I2C_SLAVE,
.instance_size = sizeof(LM823KbdState),
.class_init = lm8323_class_init,

6
hw/intc/i8259_common.c
View File

@ -123,9 +123,9 @@ static const VMStateDescription vmstate_pic_common = {
};
static Property pic_properties_common[] = {
DEFINE_PROP_HEX32("iobase", PICCommonState, iobase, -1),
DEFINE_PROP_HEX32("elcr_addr", PICCommonState, elcr_addr, -1),
DEFINE_PROP_HEX8("elcr_mask", PICCommonState, elcr_mask, -1),
DEFINE_PROP_UINT32("iobase", PICCommonState, iobase, -1),
DEFINE_PROP_UINT32("elcr_addr", PICCommonState, elcr_addr, -1),
DEFINE_PROP_UINT8("elcr_mask", PICCommonState, elcr_mask, -1),
DEFINE_PROP_BIT("master", PICCommonState, master, 0, false),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/ipack/Makefile.objs Normal file
View File

@ -0,0 +1,2 @@
common-obj-$(CONFIG_IPACK) += ipack.o
common-obj-$(CONFIG_IPACK) += tpci200.o

43
hw/char/ipack.c → hw/ipack/ipack.c
View File

@ -8,7 +8,7 @@
* later version.
*/
#include "ipack.h"
#include "hw/ipack/ipack.h"
IPackDevice *ipack_device_find(IPackBus *bus, int32_t slot)
{
@ -34,37 +34,39 @@ void ipack_bus_new_inplace(IPackBus *bus, size_t bus_size,
bus->set_irq = handler;
}
static int ipack_device_dev_init(DeviceState *qdev)
static void ipack_device_realize(DeviceState *dev, Error **errp)
{
IPackBus *bus = IPACK_BUS(qdev_get_parent_bus(qdev));
IPackDevice *dev = IPACK_DEVICE(qdev);
IPackDevice *idev = IPACK_DEVICE(dev);
IPackBus *bus = IPACK_BUS(qdev_get_parent_bus(dev));
IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(dev);
if (dev->slot < 0) {
dev->slot = bus->free_slot;
if (idev->slot < 0) {
idev->slot = bus->free_slot;
}
if (dev->slot >= bus->n_slots) {
return -1;
if (idev->slot >= bus->n_slots) {
error_setg(errp, "Only %" PRIu8 " slots available.", bus->n_slots);
return;
}
bus->free_slot = dev->slot + 1;
bus->free_slot = idev->slot + 1;
dev->irq = qemu_allocate_irqs(bus->set_irq, dev, 2);
idev->irq = qemu_allocate_irqs(bus->set_irq, idev, 2);
return k->init(dev);
k->realize(dev, errp);
}
static int ipack_device_dev_exit(DeviceState *qdev)
static void ipack_device_unrealize(DeviceState *dev, Error **errp)
{
IPackDevice *dev = IPACK_DEVICE(qdev);
IPackDevice *idev = IPACK_DEVICE(dev);
IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(dev);
Error *err = NULL;
if (k->exit) {
k->exit(dev);
if (k->unrealize) {
k->unrealize(dev, &err);
error_propagate(errp, err);
return;
}
qemu_free_irqs(dev->irq);
return 0;
qemu_free_irqs(idev->irq);
}
static Property ipack_device_props[] = {
@ -75,10 +77,11 @@ static Property ipack_device_props[] = {
static void ipack_device_class_init(ObjectClass *klass, void *data)
{
DeviceClass *k = DEVICE_CLASS(klass);
set_bit(DEVICE_CATEGORY_INPUT, k->categories);
k->bus_type = TYPE_IPACK_BUS;
k->init = ipack_device_dev_init;
k->exit = ipack_device_dev_exit;
k->realize = ipack_device_realize;
k->unrealize = ipack_device_unrealize;
k->props = ipack_device_props;
}

2
hw/char/tpci200.c → hw/ipack/tpci200.c
View File

@ -8,7 +8,7 @@
* later version.
*/
#include "ipack.h"
#include "hw/ipack/ipack.h"
#include "hw/pci/pci.h"
#include "qemu/bitops.h"
#include <stdio.h>

2
hw/isa/pc87312.c
View File

@ -369,7 +369,7 @@ static const VMStateDescription vmstate_pc87312 = {
};
static Property pc87312_properties[] = {
DEFINE_PROP_HEX32("iobase", PC87312State, iobase, 0x398),
DEFINE_PROP_UINT32("iobase", PC87312State, iobase, 0x398),
DEFINE_PROP_UINT8("config", PC87312State, config, 1),
DEFINE_PROP_END_OF_LIST()
};

4
hw/isa/vt82c686.c
View File

@ -369,8 +369,8 @@ static int vt82c686b_pm_initfn(PCIDevice *dev)
return 0;
}
i2c_bus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq)
I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq)
{
PCIDevice *dev;
VT686PMState *s;

2
hw/mips/mips_fulong2e.c
View File

@ -276,7 +276,7 @@ static void mips_fulong2e_init(QEMUMachineInitArgs *args)
qemu_irq *cpu_exit_irq;
PCIBus *pci_bus;
ISABus *isa_bus;
i2c_bus *smbus;
I2CBus *smbus;
int i;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
MIPSCPU *cpu;

2
hw/mips/mips_malta.c
View File

@ -900,7 +900,7 @@ void mips_malta_init(QEMUMachineInitArgs *args)
qemu_irq *isa_irq;
qemu_irq *cpu_exit_irq;
int piix4_devfn;
i2c_bus *smbus;
I2CBus *smbus;
int i;
DriveInfo *dinfo;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

2
hw/misc/applesmc.c
View File

@ -249,7 +249,7 @@ static void applesmc_isa_realize(DeviceState *dev, Error **errp)
}
static Property applesmc_isa_properties[] = {
DEFINE_PROP_HEX32("iobase", AppleSMCState, iobase,
DEFINE_PROP_UINT32("iobase", AppleSMCState, iobase,
APPLESMC_DEFAULT_IOBASE),
DEFINE_PROP_STRING("osk", AppleSMCState, osk),
DEFINE_PROP_END_OF_LIST(),

4
hw/misc/debugexit.c
View File

@ -47,8 +47,8 @@ static void debug_exit_realizefn(DeviceState *d, Error **errp)
}
static Property debug_exit_properties[] = {
DEFINE_PROP_HEX32("iobase", ISADebugExitState, iobase, 0x501),
DEFINE_PROP_HEX32("iosize", ISADebugExitState, iosize, 0x02),
DEFINE_PROP_UINT32("iobase", ISADebugExitState, iobase, 0x501),
DEFINE_PROP_UINT32("iosize", ISADebugExitState, iosize, 0x02),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/misc/eccmemctl.c
View File

@ -314,7 +314,7 @@ static int ecc_init1(SysBusDevice *dev)
}
static Property ecc_properties[] = {
DEFINE_PROP_HEX32("version", ECCState, version, -1),
DEFINE_PROP_UINT32("version", ECCState, version, -1),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/net/ne2000-isa.c
View File

@ -86,7 +86,7 @@ static void isa_ne2000_realizefn(DeviceState *dev, Error **errp)
}
static Property ne2000_isa_properties[] = {
DEFINE_PROP_HEX32("iobase", ISANE2000State, iobase, 0x300),
DEFINE_PROP_UINT32("iobase", ISANE2000State, iobase, 0x300),
DEFINE_PROP_UINT32("irq", ISANE2000State, isairq, 9),
DEFINE_NIC_PROPERTIES(ISANE2000State, ne2000.c),
DEFINE_PROP_END_OF_LIST(),

4
hw/nvram/fw_cfg.c
View File

@ -584,8 +584,8 @@ static void fw_cfg_realize(DeviceState *dev, Error **errp)
}
static Property fw_cfg_properties[] = {
DEFINE_PROP_HEX32("ctl_iobase", FWCfgState, ctl_iobase, -1),
DEFINE_PROP_HEX32("data_iobase", FWCfgState, data_iobase, -1),
DEFINE_PROP_UINT32("ctl_iobase", FWCfgState, ctl_iobase, -1),
DEFINE_PROP_UINT32("data_iobase", FWCfgState, data_iobase, -1),
DEFINE_PROP_END_OF_LIST(),
};

4
hw/ppc/Makefile.objs
View File

@ -10,9 +10,9 @@ obj-y += ppc4xx_pci.o
# PReP
obj-$(CONFIG_PREP) += prep.o
# OldWorld PowerMac
obj-y += mac_oldworld.o
obj-$(CONFIG_MAC) += mac_oldworld.o
# NewWorld PowerMac
obj-y += mac_newworld.o
obj-$(CONFIG_MAC) += mac_newworld.o
# e500
obj-$(CONFIG_E500) += e500.o mpc8544ds.o e500plat.o
obj-$(CONFIG_E500) += mpc8544_guts.o ppce500_spin.o

16
hw/ppc/spapr_pci.c
View File

@ -651,14 +651,14 @@ static void spapr_phb_reset(DeviceState *qdev)
static Property spapr_phb_properties[] = {
DEFINE_PROP_INT32("index", sPAPRPHBState, index, -1),
DEFINE_PROP_HEX64("buid", sPAPRPHBState, buid, -1),
DEFINE_PROP_HEX32("liobn", sPAPRPHBState, dma_liobn, -1),
DEFINE_PROP_HEX64("mem_win_addr", sPAPRPHBState, mem_win_addr, -1),
DEFINE_PROP_HEX64("mem_win_size", sPAPRPHBState, mem_win_size,
SPAPR_PCI_MMIO_WIN_SIZE),
DEFINE_PROP_HEX64("io_win_addr", sPAPRPHBState, io_win_addr, -1),
DEFINE_PROP_HEX64("io_win_size", sPAPRPHBState, io_win_size,
SPAPR_PCI_IO_WIN_SIZE),
DEFINE_PROP_UINT64("buid", sPAPRPHBState, buid, -1),
DEFINE_PROP_UINT32("liobn", sPAPRPHBState, dma_liobn, -1),
DEFINE_PROP_UINT64("mem_win_addr", sPAPRPHBState, mem_win_addr, -1),
DEFINE_PROP_UINT64("mem_win_size", sPAPRPHBState, mem_win_size,
SPAPR_PCI_MMIO_WIN_SIZE),
DEFINE_PROP_UINT64("io_win_addr", sPAPRPHBState, io_win_addr, -1),
DEFINE_PROP_UINT64("io_win_size", sPAPRPHBState, io_win_size,
SPAPR_PCI_IO_WIN_SIZE),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/scsi/megasas.c
View File

@ -2195,7 +2195,7 @@ static Property megasas_properties[] = {
DEFINE_PROP_UINT32("max_cmds", MegasasState, fw_cmds,
MEGASAS_DEFAULT_FRAMES),
DEFINE_PROP_STRING("hba_serial", MegasasState, hba_serial),
DEFINE_PROP_HEX64("sas_address", MegasasState, sas_addr, 0),
DEFINE_PROP_UINT64("sas_address", MegasasState, sas_addr, 0),
#ifdef USE_MSIX
DEFINE_PROP_BIT("use_msix", MegasasState, flags,
MEGASAS_FLAG_USE_MSIX, false),

6
hw/scsi/scsi-disk.c
View File

@ -2535,7 +2535,7 @@ static Property scsi_hd_properties[] = {
SCSI_DISK_F_REMOVABLE, false),
DEFINE_PROP_BIT("dpofua", SCSIDiskState, features,
SCSI_DISK_F_DPOFUA, false),
DEFINE_PROP_HEX64("wwn", SCSIDiskState, wwn, 0),
DEFINE_PROP_UINT64("wwn", SCSIDiskState, wwn, 0),
DEFINE_PROP_UINT64("max_unmap_size", SCSIDiskState, max_unmap_size,
DEFAULT_MAX_UNMAP_SIZE),
DEFINE_BLOCK_CHS_PROPERTIES(SCSIDiskState, qdev.conf),
@ -2583,7 +2583,7 @@ static const TypeInfo scsi_hd_info = {
static Property scsi_cd_properties[] = {
DEFINE_SCSI_DISK_PROPERTIES(),
DEFINE_PROP_HEX64("wwn", SCSIDiskState, wwn, 0),
DEFINE_PROP_UINT64("wwn", SCSIDiskState, wwn, 0),
DEFINE_PROP_END_OF_LIST(),
};
@ -2646,7 +2646,7 @@ static Property scsi_disk_properties[] = {
SCSI_DISK_F_REMOVABLE, false),
DEFINE_PROP_BIT("dpofua", SCSIDiskState, features,
SCSI_DISK_F_DPOFUA, false),
DEFINE_PROP_HEX64("wwn", SCSIDiskState, wwn, 0),
DEFINE_PROP_UINT64("wwn", SCSIDiskState, wwn, 0),
DEFINE_PROP_UINT64("max_unmap_size", SCSIDiskState, max_unmap_size,
DEFAULT_MAX_UNMAP_SIZE),
DEFINE_PROP_END_OF_LIST(),

4
hw/sd/sdhci.c
View File

@ -1233,9 +1233,9 @@ const VMStateDescription sdhci_vmstate = {
/* Capabilities registers provide information on supported features of this
* specific host controller implementation */
static Property sdhci_properties[] = {
DEFINE_PROP_HEX32("capareg", SDHCIState, capareg,
DEFINE_PROP_UINT32("capareg", SDHCIState, capareg,
SDHC_CAPAB_REG_DEFAULT),
DEFINE_PROP_HEX32("maxcurr", SDHCIState, maxcurr, 0),
DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0),
DEFINE_PROP_END_OF_LIST(),
};

21
hw/timer/ds1338.c
View File

@ -23,8 +23,12 @@
#define HOURS_PM 0x20
#define CTRL_OSF 0x20
typedef struct {
I2CSlave i2c;
#define TYPE_DS1338 "ds1338"
#define DS1338(obj) OBJECT_CHECK(DS1338State, (obj), TYPE_DS1338)
typedef struct DS1338State {
I2CSlave parent_obj;
int64_t offset;
uint8_t wday_offset;
uint8_t nvram[NVRAM_SIZE];
@ -38,7 +42,7 @@ static const VMStateDescription vmstate_ds1338 = {
.minimum_version_id = 1,
.minimum_version_id_old = 1,
.fields = (VMStateField[]) {
VMSTATE_I2C_SLAVE(i2c, DS1338State),
VMSTATE_I2C_SLAVE(parent_obj, DS1338State),
VMSTATE_INT64(offset, DS1338State),
VMSTATE_UINT8_V(wday_offset, DS1338State, 2),
VMSTATE_UINT8_ARRAY(nvram, DS1338State, NVRAM_SIZE),
@ -90,7 +94,7 @@ static void inc_regptr(DS1338State *s)
static void ds1338_event(I2CSlave *i2c, enum i2c_event event)
{
DS1338State *s = FROM_I2C_SLAVE(DS1338State, i2c);
DS1338State *s = DS1338(i2c);
switch (event) {
case I2C_START_RECV:
@ -111,7 +115,7 @@ static void ds1338_event(I2CSlave *i2c, enum i2c_event event)
static int ds1338_recv(I2CSlave *i2c)
{
DS1338State *s = FROM_I2C_SLAVE(DS1338State, i2c);
DS1338State *s = DS1338(i2c);
uint8_t res;
res = s->nvram[s->ptr];
@ -121,7 +125,8 @@ static int ds1338_recv(I2CSlave *i2c)
static int ds1338_send(I2CSlave *i2c, uint8_t data)
{
DS1338State *s = FROM_I2C_SLAVE(DS1338State, i2c);
DS1338State *s = DS1338(i2c);
if (s->addr_byte) {
s->ptr = data & (NVRAM_SIZE - 1);
s->addr_byte = false;
@ -198,7 +203,7 @@ static int ds1338_init(I2CSlave *i2c)
static void ds1338_reset(DeviceState *dev)
{
DS1338State *s = FROM_I2C_SLAVE(DS1338State, I2C_SLAVE(dev));
DS1338State *s = DS1338(dev);
/* The clock is running and synchronized with the host */
s->offset = 0;
@ -222,7 +227,7 @@ static void ds1338_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo ds1338_info = {
.name = "ds1338",
.name = TYPE_DS1338,
.parent = TYPE_I2C_SLAVE,
.instance_size = sizeof(DS1338State),
.class_init = ds1338_class_init,

2
hw/timer/i8254.c
View File

@ -342,7 +342,7 @@ static void pit_realizefn(DeviceState *dev, Error **err)
}
static Property pit_properties[] = {
DEFINE_PROP_HEX32("iobase", PITCommonState, iobase, -1),
DEFINE_PROP_UINT32("iobase", PITCommonState, iobase, -1),
DEFINE_PROP_END_OF_LIST(),
};

4
hw/timer/m48t59.c
View File

@ -741,7 +741,7 @@ static int m48t59_init1(SysBusDevice *dev)
static Property m48t59_isa_properties[] = {
DEFINE_PROP_UINT32("size", M48t59ISAState, state.size, -1),
DEFINE_PROP_UINT32("model", M48t59ISAState, state.model, -1),
DEFINE_PROP_HEX32( "io_base", M48t59ISAState, state.io_base, 0),
DEFINE_PROP_UINT32("io_base", M48t59ISAState, state.io_base, 0),
DEFINE_PROP_END_OF_LIST(),
};
@ -766,7 +766,7 @@ static const TypeInfo m48t59_isa_info = {
static Property m48t59_properties[] = {
DEFINE_PROP_UINT32("size", M48t59SysBusState, state.size, -1),
DEFINE_PROP_UINT32("model", M48t59SysBusState, state.model, -1),
DEFINE_PROP_HEX32( "io_base", M48t59SysBusState, state.io_base, 0),
DEFINE_PROP_UINT32("io_base", M48t59SysBusState, state.io_base, 0),
DEFINE_PROP_END_OF_LIST(),
};

14
hw/timer/mc146818rtc.c
View File

@ -185,7 +185,7 @@ static void rtc_periodic_timer(void *opaque)
if (s->cmos_data[RTC_REG_B] & REG_B_PIE) {
s->cmos_data[RTC_REG_C] |= REG_C_IRQF;
#ifdef TARGET_I386
if (s->lost_tick_policy == LOST_TICK_SLEW) {
if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) {
if (s->irq_reinject_on_ack_count >= RTC_REINJECT_ON_ACK_COUNT)
s->irq_reinject_on_ack_count = 0;
apic_reset_irq_delivered();
@ -708,7 +708,7 @@ static int rtc_post_load(void *opaque, int version_id)
#ifdef TARGET_I386
if (version_id >= 2) {
if (s->lost_tick_policy == LOST_TICK_SLEW) {
if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) {
rtc_coalesced_timer_update(s);
}
}
@ -749,7 +749,7 @@ static void rtc_notify_clock_reset(Notifier *notifier, void *data)
periodic_timer_update(s, now);
check_update_timer(s);
#ifdef TARGET_I386
if (s->lost_tick_policy == LOST_TICK_SLEW) {
if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) {
rtc_coalesced_timer_update(s);
}
#endif
@ -774,7 +774,7 @@ static void rtc_reset(void *opaque)
qemu_irq_lower(s->irq);
#ifdef TARGET_I386
if (s->lost_tick_policy == LOST_TICK_SLEW) {
if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) {
s->irq_coalesced = 0;
}
#endif
@ -835,11 +835,11 @@ static void rtc_realizefn(DeviceState *dev, Error **errp)
#ifdef TARGET_I386
switch (s->lost_tick_policy) {
case LOST_TICK_SLEW:
case LOST_TICK_POLICY_SLEW:
s->coalesced_timer =
timer_new_ns(rtc_clock, rtc_coalesced_timer, s);
break;
case LOST_TICK_DISCARD:
case LOST_TICK_POLICY_DISCARD:
break;
default:
error_setg(errp, "Invalid lost tick policy.");
@ -890,7 +890,7 @@ ISADevice *rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq)
static Property mc146818rtc_properties[] = {
DEFINE_PROP_INT32("base_year", RTCState, base_year, 1980),
DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", RTCState,
lost_tick_policy, LOST_TICK_DISCARD),
lost_tick_policy, LOST_TICK_POLICY_DISCARD),
DEFINE_PROP_END_OF_LIST(),
};

35
hw/timer/twl92230.c
View File

@ -27,8 +27,11 @@
#define VERBOSE 1
typedef struct {
I2CSlave i2c;
#define TYPE_TWL92230 "twl92230"
#define TWL92230(obj) OBJECT_CHECK(MenelausState, (obj), TYPE_TWL92230)
typedef struct MenelausState {
I2CSlave parent_obj;
int firstbyte;
uint8_t reg;
@ -127,7 +130,8 @@ static void menelaus_rtc_hz(void *opaque)
static void menelaus_reset(I2CSlave *i2c)
{
MenelausState *s = (MenelausState *) i2c;
MenelausState *s = TWL92230(i2c);
s->reg = 0x00;
s->vcore[0] = 0x0c; /* XXX: X-loader needs 0x8c? check! */
@ -492,8 +496,9 @@ static void menelaus_write(void *opaque, uint8_t addr, uint8_t value)
break;
case MENELAUS_DEVICE_OFF:
if (value & 1)
menelaus_reset(&s->i2c);
if (value & 1) {
menelaus_reset(I2C_SLAVE(s));
}
break;
case MENELAUS_OSC_CTRL:
@ -708,7 +713,7 @@ static void menelaus_write(void *opaque, uint8_t addr, uint8_t value)
static void menelaus_event(I2CSlave *i2c, enum i2c_event event)
{
MenelausState *s = (MenelausState *) i2c;
MenelausState *s = TWL92230(i2c);
if (event == I2C_START_SEND)
s->firstbyte = 1;
@ -716,7 +721,8 @@ static void menelaus_event(I2CSlave *i2c, enum i2c_event event)
static int menelaus_tx(I2CSlave *i2c, uint8_t data)
{
MenelausState *s = (MenelausState *) i2c;
MenelausState *s = TWL92230(i2c);
/* Interpret register address byte */
if (s->firstbyte) {
s->reg = data;
@ -729,7 +735,7 @@ static int menelaus_tx(I2CSlave *i2c, uint8_t data)
static int menelaus_rx(I2CSlave *i2c)
{
MenelausState *s = (MenelausState *) i2c;
MenelausState *s = TWL92230(i2c);
return menelaus_read(s, s->reg ++);
}
@ -834,23 +840,24 @@ static const VMStateDescription vmstate_menelaus = {
VMSTATE_STRUCT(rtc.alm, MenelausState, 0, vmstate_menelaus_tm,
struct tm),
VMSTATE_UINT8(pwrbtn_state, MenelausState),
VMSTATE_I2C_SLAVE(i2c, MenelausState),
VMSTATE_I2C_SLAVE(parent_obj, MenelausState),
VMSTATE_END_OF_LIST()
}
};
static int twl92230_init(I2CSlave *i2c)
{
MenelausState *s = FROM_I2C_SLAVE(MenelausState, i2c);
DeviceState *dev = DEVICE(i2c);
MenelausState *s = TWL92230(i2c);
s->rtc.hz_tm = timer_new_ms(rtc_clock, menelaus_rtc_hz, s);
/* Three output pins plus one interrupt pin. */
qdev_init_gpio_out(&i2c->qdev, s->out, 4);
qdev_init_gpio_out(dev, s->out, 4);
/* Three input pins plus one power-button pin. */
qdev_init_gpio_in(&i2c->qdev, menelaus_gpio_set, 4);
qdev_init_gpio_in(dev, menelaus_gpio_set, 4);
menelaus_reset(&s->i2c);
menelaus_reset(i2c);
return 0;
}
@ -868,7 +875,7 @@ static void twl92230_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo twl92230_info = {
.name = "twl92230",
.name = TYPE_TWL92230,
.parent = TYPE_I2C_SLAVE,
.instance_size = sizeof(MenelausState),
.class_init = twl92230_class_init,

4
hw/usb/host-libusb.c
View File

@ -1324,8 +1324,8 @@ static Property usb_host_dev_properties[] = {
DEFINE_PROP_UINT32("hostbus", USBHostDevice, match.bus_num, 0),
DEFINE_PROP_UINT32("hostaddr", USBHostDevice, match.addr, 0),
DEFINE_PROP_STRING("hostport", USBHostDevice, match.port),
DEFINE_PROP_HEX32("vendorid", USBHostDevice, match.vendor_id, 0),
DEFINE_PROP_HEX32("productid", USBHostDevice, match.product_id, 0),
DEFINE_PROP_UINT32("vendorid", USBHostDevice, match.vendor_id, 0),
DEFINE_PROP_UINT32("productid", USBHostDevice, match.product_id, 0),
DEFINE_PROP_UINT32("isobufs", USBHostDevice, iso_urb_count, 4),
DEFINE_PROP_UINT32("isobsize", USBHostDevice, iso_urb_frames, 32),
DEFINE_PROP_INT32("bootindex", USBHostDevice, bootindex, -1),

6
hw/virtio/virtio-pci.c
View File

@ -1063,7 +1063,7 @@ static const TypeInfo virtio_pci_info = {
/* virtio-blk-pci */
static Property virtio_blk_pci_properties[] = {
DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
@ -1275,7 +1275,7 @@ static void balloon_pci_stats_set_poll_interval(Object *obj, struct Visitor *v,
static Property virtio_balloon_pci_properties[] = {
DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
DEFINE_PROP_END_OF_LIST(),
};
@ -1376,7 +1376,7 @@ static Property virtio_serial_pci_properties[] = {
DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
DEFINE_VIRTIO_SERIAL_PROPERTIES(VirtIOSerialPCI, vdev.serial),
DEFINE_PROP_END_OF_LIST(),

2
include/hw/arm/exynos4210.h
View File

@ -97,7 +97,7 @@ typedef struct Exynos4210State {
MemoryRegion dram1_mem;
MemoryRegion boot_secondary;
MemoryRegion bootreg_mem;
i2c_bus *i2c_if[EXYNOS4210_I2C_NUMBER];
I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
} Exynos4210State;
void exynos4210_write_secondary(ARMCPU *cpu,

2
include/hw/arm/omap.h
View File

@ -765,7 +765,7 @@ void omap_mmc_handlers(struct omap_mmc_s *s, qemu_irq ro, qemu_irq cover);
void omap_mmc_enable(struct omap_mmc_s *s, int enable);
/* omap_i2c.c */
i2c_bus *omap_i2c_bus(DeviceState *omap_i2c);
I2CBus *omap_i2c_bus(DeviceState *omap_i2c);
# define cpu_is_omap310(cpu) (cpu->mpu_model == omap310)
# define cpu_is_omap1510(cpu) (cpu->mpu_model == omap1510)

2
include/hw/arm/pxa.h
View File

@ -116,7 +116,7 @@ void pxa27x_register_keypad(PXA2xxKeyPadState *kp,
typedef struct PXA2xxI2CState PXA2xxI2CState;
PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base,
qemu_irq irq, uint32_t page_size);
i2c_bus *pxa2xx_i2c_bus(PXA2xxI2CState *s);
I2CBus *pxa2xx_i2c_bus(PXA2xxI2CState *s);
typedef struct PXA2xxI2SState PXA2xxI2SState;
typedef struct PXA2xxFIrState PXA2xxFIrState;

6
include/hw/block/block.h
View File

@ -65,12 +65,6 @@ int blkconf_geometry(BlockConf *conf, int *trans,
/* Hard disk geometry */
#define BIOS_ATA_TRANSLATION_AUTO 0
#define BIOS_ATA_TRANSLATION_NONE 1
#define BIOS_ATA_TRANSLATION_LBA 2
#define BIOS_ATA_TRANSLATION_LARGE 3
#define BIOS_ATA_TRANSLATION_RECHS 4
void hd_geometry_guess(BlockDriverState *bs,
uint32_t *pcyls, uint32_t *pheads, uint32_t *psecs,
int *ptrans);

18
include/hw/i2c/i2c.h
View File

@ -50,18 +50,16 @@ struct I2CSlave
uint8_t address;
};
i2c_bus *i2c_init_bus(DeviceState *parent, const char *name);
I2CBus *i2c_init_bus(DeviceState *parent, const char *name);
void i2c_set_slave_address(I2CSlave *dev, uint8_t address);
int i2c_bus_busy(i2c_bus *bus);
int i2c_start_transfer(i2c_bus *bus, uint8_t address, int recv);
void i2c_end_transfer(i2c_bus *bus);
void i2c_nack(i2c_bus *bus);
int i2c_send(i2c_bus *bus, uint8_t data);
int i2c_recv(i2c_bus *bus);
int i2c_bus_busy(I2CBus *bus);
int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv);
void i2c_end_transfer(I2CBus *bus);
void i2c_nack(I2CBus *bus);
int i2c_send(I2CBus *bus, uint8_t data);
int i2c_recv(I2CBus *bus);
#define FROM_I2C_SLAVE(type, dev) DO_UPCAST(type, i2c, dev)
DeviceState *i2c_create_slave(i2c_bus *bus, const char *name, uint8_t addr);
DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr);
/* wm8750.c */
void wm8750_data_req_set(DeviceState *dev,

2
include/hw/i2c/pm_smbus.h
View File

@ -2,7 +2,7 @@
#define PM_SMBUS_H
typedef struct PMSMBus {
i2c_bus *smbus;
I2CBus *smbus;
MemoryRegion io;
uint8_t smb_stat;

20
include/hw/i2c/smbus.h
View File

@ -66,18 +66,18 @@ struct SMBusDevice {
};
/* Master device commands. */
void smbus_quick_command(i2c_bus *bus, uint8_t addr, int read);
uint8_t smbus_receive_byte(i2c_bus *bus, uint8_t addr);
void smbus_send_byte(i2c_bus *bus, uint8_t addr, uint8_t data);
uint8_t smbus_read_byte(i2c_bus *bus, uint8_t addr, uint8_t command);
void smbus_write_byte(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t data);
uint16_t smbus_read_word(i2c_bus *bus, uint8_t addr, uint8_t command);
void smbus_write_word(i2c_bus *bus, uint8_t addr, uint8_t command, uint16_t data);
int smbus_read_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data);
void smbus_write_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data,
void smbus_quick_command(I2CBus *bus, uint8_t addr, int read);
uint8_t smbus_receive_byte(I2CBus *bus, uint8_t addr);
void smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data);
uint8_t smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command);
void smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data);
uint16_t smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command);
void smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data);
int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data);
void smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
int len);
void smbus_eeprom_init(i2c_bus *smbus, int nb_eeprom,
void smbus_eeprom_init(I2CBus *smbus, int nb_eeprom,
const uint8_t *eeprom_spd, int size);
#endif

2
include/hw/i386/ich9.h
View File

@ -20,7 +20,7 @@ int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx);
PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin);
void ich9_lpc_pm_init(PCIDevice *pci_lpc);
PCIBus *ich9_d2pbr_init(PCIBus *bus, int devfn, int sec_bus);
i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base);
I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base);
#define ICH9_CC_SIZE (16 * 1024) /* 16KB */

6
include/hw/i386/pc.h
View File

@ -165,9 +165,9 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
/* acpi_piix.c */
i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq, qemu_irq smi_irq,
int kvm_enabled, FWCfgState *fw_cfg);
I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq, qemu_irq smi_irq,
int kvm_enabled, FWCfgState *fw_cfg);
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
/* hpet.c */

15
hw/char/ipack.h → include/hw/ipack/ipack.h
View File

@ -19,7 +19,9 @@ typedef struct IPackBus IPackBus;
#define IPACK_BUS(obj) OBJECT_CHECK(IPackBus, (obj), TYPE_IPACK_BUS)
struct IPackBus {
BusState qbus;
/*< private >*/
BusState parent_obj;
/* All fields are private */
uint8_t n_slots;
uint8_t free_slot;
@ -38,10 +40,12 @@ typedef struct IPackDeviceClass IPackDeviceClass;
OBJECT_GET_CLASS(IPackDeviceClass, (obj), TYPE_IPACK_DEVICE)
struct IPackDeviceClass {
/*< private >*/
DeviceClass parent_class;
/*< public >*/
int (*init)(IPackDevice *dev);
int (*exit)(IPackDevice *dev);
DeviceRealize realize;
DeviceUnrealize unrealize;
uint16_t (*io_read)(IPackDevice *dev, uint8_t addr);
void (*io_write)(IPackDevice *dev, uint8_t addr, uint16_t val);
@ -60,7 +64,10 @@ struct IPackDeviceClass {
};
struct IPackDevice {
DeviceState qdev;
/*< private >*/
DeviceState parent_obj;
/*< public >*/
int32_t slot;
/* IRQ objects for the IndustryPack INT0# and INT1# */
qemu_irq *irq;

4
include/hw/isa/vt82c686.h
View File

@ -5,7 +5,7 @@
ISABus *vt82c686b_init(PCIBus * bus, int devfn);
void vt82c686b_ac97_init(PCIBus *bus, int devfn);
void vt82c686b_mc97_init(PCIBus *bus, int devfn);
i2c_bus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq);
I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq);
#endif

1
include/hw/qdev-core.h
View File

@ -217,7 +217,6 @@ struct PropertyInfo {
const char *name;
const char *legacy_name;
const char **enum_table;
int (*parse)(DeviceState *dev, Property *prop, const char *str);
int (*print)(DeviceState *dev, Property *prop, char *dest, size_t len);
ObjectPropertyAccessor *get;
ObjectPropertyAccessor *set;

2
include/hw/qdev-dma.h
View File

@ -7,4 +7,4 @@
* See the COPYING file in the top-level directory.
*/
#define DEFINE_PROP_DMAADDR(_n, _s, _f, _d) \
DEFINE_PROP_HEX64(_n, _s, _f, _d)
DEFINE_PROP_UINT64(_n, _s, _f, _d)

11
include/hw/qdev-properties.h
View File

@ -12,9 +12,6 @@ extern PropertyInfo qdev_prop_uint16;
extern PropertyInfo qdev_prop_uint32;
extern PropertyInfo qdev_prop_int32;
extern PropertyInfo qdev_prop_uint64;
extern PropertyInfo qdev_prop_hex8;
extern PropertyInfo qdev_prop_hex32;
extern PropertyInfo qdev_prop_hex64;
extern PropertyInfo qdev_prop_size;
extern PropertyInfo qdev_prop_string;
extern PropertyInfo qdev_prop_chr;
@ -111,12 +108,6 @@ extern PropertyInfo qdev_prop_arraylen;
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_int32, int32_t)
#define DEFINE_PROP_UINT64(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint64, uint64_t)
#define DEFINE_PROP_HEX8(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex8, uint8_t)
#define DEFINE_PROP_HEX32(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex32, uint32_t)
#define DEFINE_PROP_HEX64(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex64, uint64_t)
#define DEFINE_PROP_SIZE(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_size, uint64_t)
#define DEFINE_PROP_PCI_DEVFN(_n, _s, _f, _d) \
@ -168,8 +159,6 @@ extern PropertyInfo qdev_prop_arraylen;
/* Set properties between creation and init. */
void *qdev_get_prop_ptr(DeviceState *dev, Property *prop);
void qdev_prop_parse(DeviceState *dev, const char *name, const char *value,
Error **errp);
void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value);
void qdev_prop_set_uint8(DeviceState *dev, const char *name, uint8_t value);
void qdev_prop_set_uint16(DeviceState *dev, const char *name, uint16_t value);

2
include/qapi/string-output-visitor.h
View File

@ -17,7 +17,7 @@
typedef struct StringOutputVisitor StringOutputVisitor;
StringOutputVisitor *string_output_visitor_new(void);
StringOutputVisitor *string_output_visitor_new(bool human);
void string_output_visitor_cleanup(StringOutputVisitor *v);
char *string_output_get_string(StringOutputVisitor *v);

8
include/qemu-common.h
View File

@ -261,14 +261,6 @@ typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size)
typedef uint64_t pcibus_t;
typedef enum LostTickPolicy {
LOST_TICK_DISCARD,
LOST_TICK_DELAY,
LOST_TICK_MERGE,
LOST_TICK_SLEW,
LOST_TICK_MAX
} LostTickPolicy;
typedef struct PCIHostDeviceAddress {
unsigned int domain;
unsigned int bus;

2
include/qemu/typedefs.h
View File

@ -43,7 +43,7 @@ typedef struct QemuConsole QemuConsole;
typedef struct CharDriverState CharDriverState;
typedef struct MACAddr MACAddr;
typedef struct NetClientState NetClientState;
typedef struct i2c_bus i2c_bus;
typedef struct I2CBus I2CBus;
typedef struct ISABus ISABus;
typedef struct ISADevice ISADevice;
typedef struct SMBusDevice SMBusDevice;

3
include/qom/object.h
View File

@ -946,12 +946,13 @@ void object_property_parse(Object *obj, const char *string,
* object_property_print:
* @obj: the object
* @name: the name of the property
* @human: if true, print for human consumption
* @errp: returns an error if this function fails
*
* Returns a string representation of the value of the property. The
* caller shall free the string.
*/
char *object_property_print(Object *obj, const char *name,
char *object_property_print(Object *obj, const char *name, bool human,
Error **errp);
/**

3
include/sysemu/qtest.h
View File

@ -15,6 +15,7 @@
#define QTEST_H
#include "qemu-common.h"
#include "qapi/error.h"
extern bool qtest_allowed;
@ -26,7 +27,7 @@ static inline bool qtest_enabled(void)
bool qtest_driver(void);
int qtest_init_accel(void);
void qtest_init(const char *qtest_chrdev, const char *qtest_log);
void qtest_init(const char *qtest_chrdev, const char *qtest_log, Error **errp);
static inline int qtest_available(void)
{

58
qapi-schema.json
View File

@ -28,7 +28,65 @@
'data': [ 'GenericError', 'CommandNotFound', 'DeviceEncrypted',
'DeviceNotActive', 'DeviceNotFound', 'KVMMissingCap' ] }
##
# LostTickPolicy:
#
# Policy for handling lost ticks in timer devices.
#
# @discard: throw away the missed tick(s) and continue with future injection
# normally. Guest time may be delayed, unless the OS has explicit
# handling of lost ticks
#
# @delay: continue to deliver ticks at the normal rate. Guest time will be
# delayed due to the late tick
#
# @merge: merge the missed tick(s) into one tick and inject. Guest time
# may be delayed, depending on how the OS reacts to the merging
# of ticks
#
# @slew: deliver ticks at a higher rate to catch up with the missed tick. The
# guest time should not be delayed once catchup is complete.
#
# Since: 2.0
##
{ 'enum': 'LostTickPolicy',
'data': ['discard', 'delay', 'merge', 'slew' ] }
##
# BiosAtaTranslation:
#
# Policy that BIOS should use to interpret cylinder/head/sector
# addresses. Note that Bochs BIOS and SeaBIOS will not actually
# translate logical CHS to physical; instead, they will use logical
# block addressing.
#
# @auto: If cylinder/heads/sizes are passed, choose between none and LBA
# depending on the size of the disk. If they are not passed,
# choose none if QEMU can guess that the disk had 16 or fewer
# heads, large if QEMU can guess that the disk had 131072 or
# fewer tracks across all heads (i.e. cylinders*heads<131072),
# otherwise LBA.
#
# @none: The physical disk geometry is equal to the logical geometry.
#
# @lba: Assume 63 sectors per track and one of 16, 32, 64, 128 or 255
# heads (if fewer than 255 are enough to cover the whole disk
# with 1024 cylinders/head). The number of cylinders/head is
# then computed based on the number of sectors and heads.
#
# @large: The number of cylinders per head is scaled down to 1024
# by correspondingly scaling up the number of heads.
#
# @rechs: Same as @large, but first convert a 16-head geometry to
# 15-head, by proportionally scaling up the number of
# cylinders/head.
#
# Since: 2.0
##
{ 'enum': 'BiosAtaTranslation',
'data': ['auto', 'none', 'lba', 'large', 'rechs']}
# @add_client
#
# Allow client connections for VNC, Spice and socket based

24
qapi/string-input-visitor.c
View File

@ -14,6 +14,7 @@
#include "qapi/string-input-visitor.h"
#include "qapi/visitor-impl.h"
#include "qapi/qmp/qerror.h"
#include "qemu/option.h"
struct StringInputVisitor
{
@ -41,6 +42,28 @@ static void parse_type_int(Visitor *v, int64_t *obj, const char *name,
*obj = val;
}
static void parse_type_size(Visitor *v, uint64_t *obj, const char *name,
Error **errp)
{
StringInputVisitor *siv = DO_UPCAST(StringInputVisitor, visitor, v);
Error *err = NULL;
uint64_t val;
if (siv->string) {
parse_option_size(name, siv->string, &val, &err);
} else {
error_set(errp, QERR_INVALID_PARAMETER_TYPE, name ? name : "null",
"size");
return;
}
if (err) {
error_propagate(errp, err);
return;
}
*obj = val;
}
static void parse_type_bool(Visitor *v, bool *obj, const char *name,
Error **errp)
{
@ -128,6 +151,7 @@ StringInputVisitor *string_input_visitor_new(const char *str)
v->visitor.type_enum = input_type_enum;
v->visitor.type_int = parse_type_int;
v->visitor.type_size = parse_type_size;
v->visitor.type_bool = parse_type_bool;
v->visitor.type_str = parse_type_str;
v->visitor.type_number = parse_type_number;

56
qapi/string-output-visitor.c
View File

@ -14,10 +14,13 @@
#include "qapi/string-output-visitor.h"
#include "qapi/visitor-impl.h"
#include "qapi/qmp/qerror.h"
#include "qemu/host-utils.h"
#include <math.h>
struct StringOutputVisitor
{
Visitor visitor;
bool human;
char *string;
};
@ -31,7 +34,45 @@ static void print_type_int(Visitor *v, int64_t *obj, const char *name,
Error **errp)
{
StringOutputVisitor *sov = DO_UPCAST(StringOutputVisitor, visitor, v);
string_output_set(sov, g_strdup_printf("%lld", (long long) *obj));
char *out;
if (sov->human) {
out = g_strdup_printf("%lld (%#llx)", (long long) *obj, (long long) *obj);
} else {
out = g_strdup_printf("%lld", (long long) *obj);
}
string_output_set(sov, out);
}
static void print_type_size(Visitor *v, uint64_t *obj, const char *name,
Error **errp)
{
StringOutputVisitor *sov = DO_UPCAST(StringOutputVisitor, visitor, v);
static const char suffixes[] = { 'B', 'K', 'M', 'G', 'T', 'P', 'E' };
uint64_t div, val;
char *out;
int i;
if (!sov->human) {
out = g_strdup_printf("%"PRIu64, *obj);
string_output_set(sov, out);
return;
}
val = *obj;
/* The exponent (returned in i) minus one gives us
* floor(log2(val * 1024 / 1000). The correction makes us
* switch to the higher power when the integer part is >= 1000.
*/
frexp(val / (1000.0 / 1024.0), &i);
i = (i - 1) / 10;
assert(i < ARRAY_SIZE(suffixes));
div = 1ULL << (i * 10);
out = g_strdup_printf("%"PRIu64" (%0.3g %c%s)", val,
(double)val/div, suffixes[i], i ? "iB" : "");
string_output_set(sov, out);
}
static void print_type_bool(Visitor *v, bool *obj, const char *name,
@ -45,7 +86,14 @@ static void print_type_str(Visitor *v, char **obj, const char *name,
Error **errp)
{
StringOutputVisitor *sov = DO_UPCAST(StringOutputVisitor, visitor, v);
string_output_set(sov, g_strdup(*obj ? *obj : ""));
char *out;
if (sov->human) {
out = *obj ? g_strdup_printf("\"%s\"", *obj) : g_strdup("<null>");
} else {
out = g_strdup(*obj ? *obj : "");
}
string_output_set(sov, out);
}
static void print_type_number(Visitor *v, double *obj, const char *name,
@ -73,14 +121,16 @@ void string_output_visitor_cleanup(StringOutputVisitor *sov)
g_free(sov);
}
StringOutputVisitor *string_output_visitor_new(void)
StringOutputVisitor *string_output_visitor_new(bool human)
{
StringOutputVisitor *v;
v = g_malloc0(sizeof(*v));
v->human = human;
v->visitor.type_enum = output_type_enum;
v->visitor.type_int = print_type_int;
v->visitor.type_size = print_type_size;
v->visitor.type_bool = print_type_bool;
v->visitor.type_str = print_type_str;
v->visitor.type_number = print_type_number;

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