diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index bcfbae4332..62bd0b8b3e 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -48,19 +48,6 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port) assert(pci_is_express(dev)); - /* - * Mangle type to convert Endpoints to Root Complex Integrated Endpoints. - * Windows will report Code 10 (device cannot start) for regular Endpoints - * on the Root Complex. - */ - if (pci_bus_is_express(dev->bus) && pci_bus_is_root(dev->bus)) { - switch (type) { - case PCI_EXP_TYPE_ENDPOINT: - type = PCI_EXP_TYPE_RC_END; - break; - } - } - pos = pci_add_capability(dev, PCI_CAP_ID_EXP, offset, PCI_EXP_VER2_SIZEOF); if (pos < 0) { @@ -100,6 +87,22 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port) return pos; } +int pcie_endpoint_cap_init(PCIDevice *dev, uint8_t offset) +{ + uint8_t type = PCI_EXP_TYPE_ENDPOINT; + + /* + * Windows guests will report Code 10, device cannot start, if + * a regular Endpoint type is exposed on a root complex. These + * should instead be Root Complex Integrated Endpoints. + */ + if (pci_bus_is_express(dev->bus) && pci_bus_is_root(dev->bus)) { + type = PCI_EXP_TYPE_RC_END; + } + + return pcie_cap_init(dev, offset, type, 0); +} + void pcie_cap_exit(PCIDevice *dev) { pci_del_capability(dev, PCI_CAP_ID_EXP, PCI_EXP_VER2_SIZEOF); diff --git a/hw/pci/pcie.h b/hw/pci/pcie.h index 31604e2742..c010007c5e 100644 --- a/hw/pci/pcie.h +++ b/hw/pci/pcie.h @@ -95,6 +95,7 @@ struct PCIExpressDevice { /* PCI express capability helper functions */ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port); +int pcie_endpoint_cap_init(PCIDevice *dev, uint8_t offset); void pcie_cap_exit(PCIDevice *dev); uint8_t pcie_cap_get_type(const PCIDevice *dev); void pcie_cap_flags_set_vector(PCIDevice *dev, uint8_t vector); diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 07afdeef5b..5aa342bda5 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -3332,7 +3332,7 @@ static int usb_xhci_initfn(struct PCIDevice *dev) PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64, &xhci->mem); - ret = pcie_cap_init(&xhci->pci_dev, 0xa0, PCI_EXP_TYPE_ENDPOINT, 0); + ret = pcie_endpoint_cap_init(&xhci->pci_dev, 0xa0); assert(ret >= 0); if (xhci->flags & (1 << XHCI_FLAG_USE_MSI)) {