target/loongarch: Supplement vcpu env initial when vcpu reset
Supplement vcpu env initial when vcpu reset, including init vcpu CSR_CPUID,CSR_TID to cpu->cpu_index. The two regs will be used in kvm_get/set_csr_ioctl. Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> Signed-off-by: xianglai li <lixianglai@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20240105075804.1228596-4-zhaotianrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
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@ -518,10 +518,12 @@ static void loongarch_cpu_reset_hold(Object *obj)
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env->CSR_ESTAT = env->CSR_ESTAT & (~MAKE_64BIT_MASK(0, 2));
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env->CSR_RVACFG = FIELD_DP64(env->CSR_RVACFG, CSR_RVACFG, RBITS, 0);
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env->CSR_CPUID = cs->cpu_index;
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env->CSR_TCFG = FIELD_DP64(env->CSR_TCFG, CSR_TCFG, EN, 0);
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env->CSR_LLBCTL = FIELD_DP64(env->CSR_LLBCTL, CSR_LLBCTL, KLO, 0);
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env->CSR_TLBRERA = FIELD_DP64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR, 0);
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env->CSR_MERRCTL = FIELD_DP64(env->CSR_MERRCTL, CSR_MERRCTL, ISMERR, 0);
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env->CSR_TID = cs->cpu_index;
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env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, TLB_TYPE, 2);
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env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, MTLB_ENTRY, 63);
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@ -319,6 +319,7 @@ typedef struct CPUArchState {
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uint64_t CSR_PWCH;
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uint64_t CSR_STLBPS;
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uint64_t CSR_RVACFG;
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uint64_t CSR_CPUID;
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uint64_t CSR_PRCFG1;
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uint64_t CSR_PRCFG2;
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uint64_t CSR_PRCFG3;
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@ -350,7 +351,6 @@ typedef struct CPUArchState {
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uint64_t CSR_DBG;
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uint64_t CSR_DERA;
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uint64_t CSR_DSAVE;
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uint64_t CSR_CPUID;
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#ifndef CONFIG_USER_ONLY
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LoongArchTLB tlb[LOONGARCH_TLB_MAX];
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