pc: acpi-build: drop template patching and create PCI bus tree dynamically
Replace AML template patching with direct composing of PCI device entries in C. It allows to simplify PCI tree generation further and saves us about 400LOC scattered through different files, confining tree generation to one C function which is much easier to deal with. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Igor Mammedov
Michael S. Tsirkin
parent
752bba815e
commit
62b52c2665
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@ -9,7 +9,6 @@ obj-y += kvmvapic.o
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obj-y += acpi-build.o
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hw/i386/acpi-build.o: hw/i386/acpi-build.c \
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hw/i386/acpi-dsdt.hex hw/i386/q35-acpi-dsdt.hex \
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hw/i386/ssdt-pcihp.hex \
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hw/i386/ssdt-tpm.hex
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iasl-option=$(shell if test -z "`$(1) $(2) 2>&1 > /dev/null`" \
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@ -294,26 +294,6 @@ build_header(GArray *linker, GArray *table_data,
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table_data->data, h, len, &h->checksum);
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}
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static GArray *build_alloc_method(const char *name, uint8_t arg_count)
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{
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GArray *method = build_alloc_array();
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build_append_namestring(method, "%s", name);
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build_append_byte(method, arg_count); /* MethodFlags: ArgCount */
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return method;
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}
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static void build_append_and_cleanup_method(GArray *device, GArray *method)
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{
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uint8_t op = 0x14; /* MethodOp */
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build_package(method, op);
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build_append_array(device, method);
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build_free_array(method);
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}
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/* End here */
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#define ACPI_PORT_SMI_CMD 0x00b2 /* TODO: this is APM_CNT_IOPORT */
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@ -494,71 +474,12 @@ static inline char acpi_get_hex(uint32_t val)
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return (val <= 9) ? ('0' + val) : ('A' + val - 10);
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}
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/* 0x5B 0x82 DeviceOp PkgLength NameString */
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#define ACPI_PCIHP_OFFSET_HEX (*ssdt_pcihp_name - *ssdt_pcihp_start + 1)
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#define ACPI_PCIHP_OFFSET_ID (*ssdt_pcihp_id - *ssdt_pcihp_start)
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#define ACPI_PCIHP_OFFSET_ADR (*ssdt_pcihp_adr - *ssdt_pcihp_start)
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#define ACPI_PCIHP_OFFSET_EJ0 (*ssdt_pcihp_ej0 - *ssdt_pcihp_start)
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#define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start)
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#define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start)
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#define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start + 1)
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#define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start)
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#define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start)
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#define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start)
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#define ACPI_PCIVGA_OFFSET_HEX (*ssdt_pcivga_name - *ssdt_pcivga_start + 1)
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#define ACPI_PCIVGA_OFFSET_ADR (*ssdt_pcivga_adr - *ssdt_pcivga_start)
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#define ACPI_PCIVGA_SIZEOF (*ssdt_pcivga_end - *ssdt_pcivga_start)
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#define ACPI_PCIVGA_AML (ssdp_pcihp_aml + *ssdt_pcivga_start)
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#define ACPI_PCIQXL_OFFSET_HEX (*ssdt_pciqxl_name - *ssdt_pciqxl_start + 1)
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#define ACPI_PCIQXL_OFFSET_ADR (*ssdt_pciqxl_adr - *ssdt_pciqxl_start)
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#define ACPI_PCIQXL_SIZEOF (*ssdt_pciqxl_end - *ssdt_pciqxl_start)
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#define ACPI_PCIQXL_AML (ssdp_pcihp_aml + *ssdt_pciqxl_start)
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#define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */
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#define ACPI_SSDT_HEADER_LENGTH 36
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#include "hw/i386/ssdt-pcihp.hex"
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#include "hw/i386/ssdt-tpm.hex"
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static void patch_pcihp(int slot, uint8_t *ssdt_ptr)
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{
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unsigned devfn = PCI_DEVFN(slot, 0);
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ssdt_ptr[ACPI_PCIHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
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ssdt_ptr[ACPI_PCIHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);
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ssdt_ptr[ACPI_PCIHP_OFFSET_ID] = slot;
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ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot;
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}
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static void patch_pcinohp(int slot, uint8_t *ssdt_ptr)
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{
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unsigned devfn = PCI_DEVFN(slot, 0);
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ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
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ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);
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ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot;
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}
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static void patch_pcivga(int slot, uint8_t *ssdt_ptr)
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{
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unsigned devfn = PCI_DEVFN(slot, 0);
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ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
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ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX + 1] = acpi_get_hex(devfn);
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ssdt_ptr[ACPI_PCIVGA_OFFSET_ADR + 2] = slot;
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}
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static void patch_pciqxl(int slot, uint8_t *ssdt_ptr)
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{
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unsigned devfn = PCI_DEVFN(slot, 0);
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ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
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ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX + 1] = acpi_get_hex(devfn);
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ssdt_ptr[ACPI_PCIQXL_OFFSET_ADR + 2] = slot;
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}
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/* Assign BSEL property to all buses. In the future, this can be changed
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* to only assign to buses that support hotplug.
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@ -590,46 +511,30 @@ static void acpi_set_pci_info(void)
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}
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}
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static void build_append_pcihp_notify_entry(GArray *method, int slot)
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static void build_append_pcihp_notify_entry(Aml *method, int slot)
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{
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GArray *ifctx;
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Aml *if_ctx;
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int32_t devfn = PCI_DEVFN(slot, 0);
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ifctx = build_alloc_array();
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build_append_byte(ifctx, 0x7B); /* AndOp */
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build_append_byte(ifctx, 0x68); /* Arg0Op */
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build_append_int(ifctx, 0x1U << slot);
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build_append_byte(ifctx, 0x00); /* NullName */
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build_append_byte(ifctx, 0x86); /* NotifyOp */
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build_append_namestring(ifctx, "S%.02X", PCI_DEVFN(slot, 0));
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build_append_byte(ifctx, 0x69); /* Arg1Op */
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/* Pack it up */
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build_package(ifctx, 0xA0 /* IfOp */);
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build_append_array(method, ifctx);
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build_free_array(ifctx);
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if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot)));
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aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
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aml_append(method, if_ctx);
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}
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static void build_append_pci_bus_devices(GArray *parent_scope, PCIBus *bus,
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static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus,
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bool pcihp_bridge_en)
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{
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GArray *bus_table = build_alloc_array();
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GArray *method = NULL;
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Aml *dev, *notify_method, *method;
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QObject *bsel;
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PCIBus *sec;
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int i;
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if (bus->parent_dev) {
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build_append_namestring(bus_table, "S%.02X_", bus->parent_dev->devfn);
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} else {
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build_append_namestring(bus_table, "PCI0");
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}
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bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
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if (bsel) {
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build_append_byte(bus_table, 0x08); /* NameOp */
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build_append_namestring(bus_table, "BSEL");
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build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel)));
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method = build_alloc_method("DVNT", 2);
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int64_t bsel_val = qint_get_int(qobject_to_qint(bsel));
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aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
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notify_method = aml_method("DVNT", 2);
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}
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for (i = 0; i < ARRAY_SIZE(bus->devices); i += PCI_FUNC_MAX) {
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@ -642,11 +547,17 @@ static void build_append_pci_bus_devices(GArray *parent_scope, PCIBus *bus,
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if (!pdev) {
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if (bsel) { /* add hotplug slots for non present devices */
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void *pcihp = acpi_data_push(bus_table, ACPI_PCIHP_SIZEOF);
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memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
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patch_pcihp(slot, pcihp);
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dev = aml_device("S%.02X", PCI_DEVFN(slot, 0));
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aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
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aml_append(dev, aml_name_decl("_ADR", aml_int(slot << 16)));
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method = aml_method("_EJ0", 1);
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aml_append(method,
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aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
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);
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aml_append(dev, method);
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aml_append(parent_scope, dev);
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build_append_pcihp_notify_entry(method, slot);
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build_append_pcihp_notify_entry(notify_method, slot);
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}
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continue;
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}
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@ -668,74 +579,87 @@ static void build_append_pci_bus_devices(GArray *parent_scope, PCIBus *bus,
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continue;
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}
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/* start to compose PCI slot descriptor */
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dev = aml_device("S%.02X", PCI_DEVFN(slot, 0));
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aml_append(dev, aml_name_decl("_ADR", aml_int(slot << 16)));
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if (pc->class_id == PCI_CLASS_DISPLAY_VGA) {
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/* add VGA specific AML methods */
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int s3d;
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if (object_dynamic_cast(OBJECT(pdev), "qxl-vga")) {
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void *pcihp = acpi_data_push(bus_table,
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ACPI_PCIQXL_SIZEOF);
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memcpy(pcihp, ACPI_PCIQXL_AML, ACPI_PCIQXL_SIZEOF);
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patch_pciqxl(slot, pcihp);
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s3d = 3;
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} else {
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void *pcihp = acpi_data_push(bus_table,
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ACPI_PCIVGA_SIZEOF);
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memcpy(pcihp, ACPI_PCIVGA_AML, ACPI_PCIVGA_SIZEOF);
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patch_pcivga(slot, pcihp);
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s3d = 0;
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}
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method = aml_method("_S1D", 0);
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aml_append(method, aml_return(aml_int(0)));
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aml_append(dev, method);
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method = aml_method("_S2D", 0);
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aml_append(method, aml_return(aml_int(0)));
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aml_append(dev, method);
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method = aml_method("_S3D", 0);
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aml_append(method, aml_return(aml_int(s3d)));
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aml_append(dev, method);
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} else if (hotplug_enabled_dev) {
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void *pcihp = acpi_data_push(bus_table, ACPI_PCIHP_SIZEOF);
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/* add _SUN/_EJ0 to make slot hotpluggable */
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aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
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memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
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patch_pcihp(slot, pcihp);
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build_append_pcihp_notify_entry(method, slot);
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method = aml_method("_EJ0", 1);
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aml_append(method,
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aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
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);
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aml_append(dev, method);
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if (bsel) {
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build_append_pcihp_notify_entry(notify_method, slot);
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}
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} else if (bridge_in_acpi) {
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/*
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* device is coldplugged bridge,
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* add child device descriptions into its scope
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*/
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PCIBus *sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
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void *pcihp = acpi_data_push(bus_table, ACPI_PCINOHP_SIZEOF);
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memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF);
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patch_pcinohp(slot, pcihp);
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build_append_pci_bus_devices(bus_table, sec_bus, pcihp_bridge_en);
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} else { /* non hotpluggable present devices */
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void *pcihp = acpi_data_push(bus_table, ACPI_PCINOHP_SIZEOF);
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memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF);
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patch_pcinohp(slot, pcihp);
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build_append_pci_bus_devices(dev, sec_bus, pcihp_bridge_en);
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}
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/* slot descriptor has been composed, add it into parent context */
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aml_append(parent_scope, dev);
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}
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if (bsel) {
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build_append_and_cleanup_method(bus_table, method);
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aml_append(parent_scope, notify_method);
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}
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/* Append PCNT method to notify about events on local and child buses.
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* Add unconditionally for root since DSDT expects it.
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*/
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method = build_alloc_method("PCNT", 0);
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method = aml_method("PCNT", 0);
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/* If bus supports hotplug select it and notify about local events */
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if (bsel) {
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build_append_byte(method, 0x70); /* StoreOp */
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build_append_int(method, qint_get_int(qobject_to_qint(bsel)));
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build_append_namestring(method, "BNUM");
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build_append_namestring(method, "DVNT");
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build_append_namestring(method, "PCIU");
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build_append_int(method, 1); /* Device Check */
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build_append_namestring(method, "DVNT");
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build_append_namestring(method, "PCID");
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build_append_int(method, 3); /* Eject Request */
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int64_t bsel_val = qint_get_int(qobject_to_qint(bsel));
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aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM")));
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aml_append(method,
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aml_call2("DVNT", aml_name("PCIU"), aml_int(1) /* Device Check */)
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);
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aml_append(method,
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aml_call2("DVNT", aml_name("PCID"), aml_int(3)/* Eject Request */)
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);
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}
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/* Notify about child bus events in any case */
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if (pcihp_bridge_en) {
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QLIST_FOREACH(sec, &bus->child, sibling) {
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build_append_namestring(method, "^S%.02X.PCNT",
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sec->parent_dev->devfn);
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int32_t devfn = sec->parent_dev->devfn;
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aml_append(method, aml_name("^S%.02X.PCNT", devfn));
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}
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}
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build_append_and_cleanup_method(bus_table, method);
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build_package(bus_table, 0x10); /* ScopeOp */
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build_append_array(parent_scope, bus_table);
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build_free_array(bus_table);
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aml_append(parent_scope, method);
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}
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static void
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@ -1087,9 +1011,10 @@ build_ssdt(GArray *table_data, GArray *linker,
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}
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if (bus) {
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Aml *scope = aml_scope("PCI0");
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/* Scan all PCI buses. Generate tables to support hotplug. */
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build_append_pci_bus_devices(sb_scope->buf, bus,
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pm->pcihp_bridge_en);
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build_append_pci_bus_devices(scope, bus, pm->pcihp_bridge_en);
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aml_append(sb_scope, scope);
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}
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}
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aml_append(ssdt, sb_scope);
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@ -1,100 +0,0 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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ACPI_EXTRACT_ALL_CODE ssdp_pcihp_aml
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DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC", "BXSSDTPCIHP", 0x1)
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{
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/****************************************************************
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* PCI hotplug
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****************************************************************/
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/* Objects supplied by DSDT */
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External(\_SB.PCI0, DeviceObj)
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External(\_SB.PCI0.PCEJ, MethodObj)
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External(BSEL, IntObj)
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Scope(\_SB.PCI0) {
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/* Bulk generated PCI hotplug devices */
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ACPI_EXTRACT_DEVICE_START ssdt_pcihp_start
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ACPI_EXTRACT_DEVICE_END ssdt_pcihp_end
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ACPI_EXTRACT_DEVICE_STRING ssdt_pcihp_name
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// Extract the offsets of the device name, address dword and the slot
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// name byte - we fill them in for each device.
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Device(SAA) {
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ACPI_EXTRACT_NAME_BYTE_CONST ssdt_pcihp_id
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Name(_SUN, 0xAA)
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ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcihp_adr
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Name(_ADR, 0xAA0000)
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Method(_EJ0, 1) {
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PCEJ(BSEL, _SUN)
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}
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}
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ACPI_EXTRACT_DEVICE_START ssdt_pcinohp_start
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ACPI_EXTRACT_DEVICE_END ssdt_pcinohp_end
|
||||
ACPI_EXTRACT_DEVICE_STRING ssdt_pcinohp_name
|
||||
|
||||
// Extract the offsets of the device name, address dword and the slot
|
||||
// name byte - we fill them in for each device.
|
||||
Device(SBB) {
|
||||
ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcinohp_adr
|
||||
Name(_ADR, 0xAA0000)
|
||||
}
|
||||
|
||||
ACPI_EXTRACT_DEVICE_START ssdt_pcivga_start
|
||||
ACPI_EXTRACT_DEVICE_END ssdt_pcivga_end
|
||||
ACPI_EXTRACT_DEVICE_STRING ssdt_pcivga_name
|
||||
|
||||
// Extract the offsets of the device name, address dword and the slot
|
||||
// name byte - we fill them in for each device.
|
||||
Device(SCC) {
|
||||
ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcivga_adr
|
||||
Name(_ADR, 0xAA0000)
|
||||
Method(_S1D, 0, NotSerialized) {
|
||||
Return (0x00)
|
||||
}
|
||||
Method(_S2D, 0, NotSerialized) {
|
||||
Return (0x00)
|
||||
}
|
||||
Method(_S3D, 0, NotSerialized) {
|
||||
Return (0x00)
|
||||
}
|
||||
}
|
||||
|
||||
ACPI_EXTRACT_DEVICE_START ssdt_pciqxl_start
|
||||
ACPI_EXTRACT_DEVICE_END ssdt_pciqxl_end
|
||||
ACPI_EXTRACT_DEVICE_STRING ssdt_pciqxl_name
|
||||
|
||||
// Extract the offsets of the device name, address dword and the slot
|
||||
// name byte - we fill them in for each device.
|
||||
Device(SDD) {
|
||||
ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pciqxl_adr
|
||||
Name(_ADR, 0xAA0000)
|
||||
Method(_S1D, 0, NotSerialized) {
|
||||
Return (0x00)
|
||||
}
|
||||
Method(_S2D, 0, NotSerialized) {
|
||||
Return (0x00)
|
||||
}
|
||||
Method(_S3D, 0, NotSerialized) {
|
||||
Return (0x03) // QXL
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue