plugins: implement inline operation relative to cpu_index
Instead of working on a fixed memory location, allow to address it based on cpu_index, an element size and a given offset. Result address: ptr + offset + cpu_index * element_size. With this, we can target a member in a struct array from a base pointer. Current semantic is not modified, thus inline operation still targets always the same memory location. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240304130036.124418-4-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240305121005.3528075-17-alex.bennee@linaro.org>
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@ -133,16 +133,28 @@ static void gen_empty_udata_cb_no_rwg(void)
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*/
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static void gen_empty_inline_cb(void)
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{
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TCGv_i32 cpu_index = tcg_temp_ebb_new_i32();
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TCGv_ptr cpu_index_as_ptr = tcg_temp_ebb_new_ptr();
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TCGv_i64 val = tcg_temp_ebb_new_i64();
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TCGv_ptr ptr = tcg_temp_ebb_new_ptr();
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tcg_gen_ld_i32(cpu_index, tcg_env,
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-offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index));
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/* second operand will be replaced by immediate value */
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tcg_gen_mul_i32(cpu_index, cpu_index, cpu_index);
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tcg_gen_ext_i32_ptr(cpu_index_as_ptr, cpu_index);
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tcg_gen_movi_ptr(ptr, 0);
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tcg_gen_add_ptr(ptr, ptr, cpu_index_as_ptr);
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tcg_gen_ld_i64(val, ptr, 0);
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/* pass an immediate != 0 so that it doesn't get optimized away */
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tcg_gen_addi_i64(val, val, 0xdeadface);
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/* second operand will be replaced by immediate value */
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tcg_gen_add_i64(val, val, val);
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tcg_gen_st_i64(val, ptr, 0);
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tcg_temp_free_ptr(ptr);
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tcg_temp_free_i64(val);
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tcg_temp_free_ptr(cpu_index_as_ptr);
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tcg_temp_free_i32(cpu_index);
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}
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static void gen_empty_mem_cb(TCGv_i64 addr, uint32_t info)
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@ -290,12 +302,37 @@ static TCGOp *copy_const_ptr(TCGOp **begin_op, TCGOp *op, void *ptr)
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return op;
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}
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static TCGOp *copy_ld_i32(TCGOp **begin_op, TCGOp *op)
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{
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return copy_op(begin_op, op, INDEX_op_ld_i32);
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}
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static TCGOp *copy_ext_i32_ptr(TCGOp **begin_op, TCGOp *op)
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{
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if (UINTPTR_MAX == UINT32_MAX) {
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op = copy_op(begin_op, op, INDEX_op_mov_i32);
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} else {
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op = copy_op(begin_op, op, INDEX_op_ext_i32_i64);
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}
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return op;
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}
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static TCGOp *copy_add_ptr(TCGOp **begin_op, TCGOp *op)
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{
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if (UINTPTR_MAX == UINT32_MAX) {
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op = copy_op(begin_op, op, INDEX_op_add_i32);
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} else {
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op = copy_op(begin_op, op, INDEX_op_add_i64);
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}
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return op;
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}
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static TCGOp *copy_ld_i64(TCGOp **begin_op, TCGOp *op)
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{
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if (TCG_TARGET_REG_BITS == 32) {
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/* 2x ld_i32 */
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op = copy_op(begin_op, op, INDEX_op_ld_i32);
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op = copy_op(begin_op, op, INDEX_op_ld_i32);
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op = copy_ld_i32(begin_op, op);
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op = copy_ld_i32(begin_op, op);
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} else {
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/* ld_i64 */
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op = copy_op(begin_op, op, INDEX_op_ld_i64);
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@ -331,6 +368,13 @@ static TCGOp *copy_add_i64(TCGOp **begin_op, TCGOp *op, uint64_t v)
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return op;
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}
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static TCGOp *copy_mul_i32(TCGOp **begin_op, TCGOp *op, uint32_t v)
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{
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op = copy_op(begin_op, op, INDEX_op_mul_i32);
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op->args[2] = tcgv_i32_arg(tcg_constant_i32(v));
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return op;
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}
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static TCGOp *copy_st_ptr(TCGOp **begin_op, TCGOp *op)
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{
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if (UINTPTR_MAX == UINT32_MAX) {
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@ -396,18 +440,17 @@ static TCGOp *append_inline_cb(const struct qemu_plugin_dyn_cb *cb,
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TCGOp *begin_op, TCGOp *op,
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int *unused)
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{
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/* const_ptr */
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op = copy_const_ptr(&begin_op, op, cb->userp);
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/* ld_i64 */
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char *ptr = cb->userp;
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size_t elem_size = 0;
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size_t offset = 0;
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op = copy_ld_i32(&begin_op, op);
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op = copy_mul_i32(&begin_op, op, elem_size);
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op = copy_ext_i32_ptr(&begin_op, op);
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op = copy_const_ptr(&begin_op, op, ptr + offset);
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op = copy_add_ptr(&begin_op, op);
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op = copy_ld_i64(&begin_op, op);
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/* add_i64 */
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op = copy_add_i64(&begin_op, op, cb->inline_insn.imm);
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/* st_i64 */
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op = copy_st_i64(&begin_op, op);
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return op;
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}
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@ -106,7 +106,8 @@ void qemu_plugin_register_vcpu_tb_exec_inline(struct qemu_plugin_tb *tb,
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void *ptr, uint64_t imm)
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{
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if (!tb->mem_only) {
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plugin_register_inline_op(&tb->cbs[PLUGIN_CB_INLINE], 0, op, ptr, imm);
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plugin_register_inline_op(&tb->cbs[PLUGIN_CB_INLINE],
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0, op, ptr, imm);
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}
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}
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@ -318,7 +318,8 @@ static struct qemu_plugin_dyn_cb *plugin_get_dyn_cb(GArray **arr)
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void plugin_register_inline_op(GArray **arr,
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enum qemu_plugin_mem_rw rw,
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enum qemu_plugin_op op, void *ptr,
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enum qemu_plugin_op op,
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void *ptr,
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uint64_t imm)
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{
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struct qemu_plugin_dyn_cb *dyn_cb;
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@ -474,9 +475,12 @@ void qemu_plugin_flush_cb(void)
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plugin_cb__simple(QEMU_PLUGIN_EV_FLUSH);
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}
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void exec_inline_op(struct qemu_plugin_dyn_cb *cb)
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void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index)
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{
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uint64_t *val = cb->userp;
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char *ptr = cb->userp;
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size_t elem_size = 0;
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size_t offset = 0;
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uint64_t *val = (uint64_t *)(ptr + offset + cpu_index * elem_size);
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switch (cb->inline_insn.op) {
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case QEMU_PLUGIN_INLINE_ADD_U64:
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@ -509,7 +513,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr,
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vaddr, cb->userp);
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break;
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case PLUGIN_CB_INLINE:
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exec_inline_op(cb);
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exec_inline_op(cb, cpu->cpu_index);
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break;
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default:
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g_assert_not_reached();
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@ -99,7 +99,7 @@ void plugin_register_vcpu_mem_cb(GArray **arr,
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enum qemu_plugin_mem_rw rw,
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void *udata);
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void exec_inline_op(struct qemu_plugin_dyn_cb *cb);
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void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index);
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int plugin_num_vcpus(void);
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