docs/cxl: Fix sentence
Signed-off-by: Stefan Weil <sw@weilnetz.de> Message-Id: <20230409201828.1159568-1-sw@weilnetz.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
parent
ca45a640b3
commit
63cec0506e
@ -111,7 +111,7 @@ Interfaces provided include:
|
||||
|
||||
CXL Root Ports (CXL RP)
|
||||
~~~~~~~~~~~~~~~~~~~~~~~
|
||||
A CXL Root Port servers te same purpose as a PCIe Root Port.
|
||||
A CXL Root Port serves the same purpose as a PCIe Root Port.
|
||||
There are a number of CXL specific Designated Vendor Specific
|
||||
Extended Capabilities (DVSEC) in PCIe Configuration Space
|
||||
and associated component register access via PCI bars.
|
||||
|
Loading…
Reference in New Issue
Block a user