OpenE2K/qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

Handle IBE on MIPS properly.

Browse Source 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3416 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-10-20 19:45:44 +00:00
parent 932a79df5d
commit 647de6ca24
3 changed files with 12 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
exec-all.h
View File

@ -608,7 +608,7 @@ static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
}
pd = env->tlb_table[mmu_idx][index].addr_code & ~TARGET_PAGE_MASK;
if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
#ifdef TARGET_SPARC
#if defined(TARGET_SPARC) || defined(TARGET_MIPS)
do_unassigned_access(addr, 0, 1, 0);
#else
cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr);

3
target-mips/cpu.h
View File

@ -479,6 +479,9 @@ int mips_find_by_name (const unsigned char *name, mips_def_t **def);
void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
int cpu_mips_register (CPUMIPSState *env, mips_def_t *def);
void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
int unused);
#define CPUState CPUMIPSState
#define cpu_init cpu_mips_init
#define cpu_exec cpu_mips_exec

8
target-mips/op_helper.c
View File

@ -591,6 +591,14 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
env = saved_env;
}
void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
int unused)
{
if (is_exec)
do_raise_exception(EXCP_IBE);
else
do_raise_exception(EXCP_DBE);
}
#endif
/* Complex FPU operations which may need stack space. */