From 6496269d7e0b7f0d42499d7e4dde19c8b6c759c9 Mon Sep 17 00:00:00 2001 From: Jiajie Chen Date: Tue, 22 Aug 2023 09:19:50 +0200 Subject: [PATCH] target/loongarch: Sign extend results in VA32 mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In VA32 mode, BL, JIRL and PC* instructions should sign-extend the low 32 bit result to 64 bits. Signed-off-by: Jiajie Chen Reviewed-by: Richard Henderson Signed-off-by: Song Gao Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20230822032724.1353391-7-gaosong@loongson.cn> Message-Id: <20230822071959.35620-1-philmd@linaro.org> --- target/loongarch/translate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c index 9a23ec786d..de7c1c5d1f 100644 --- a/target/loongarch/translate.c +++ b/target/loongarch/translate.c @@ -238,6 +238,9 @@ static TCGv make_address_i(DisasContext *ctx, TCGv base, target_long ofs) static uint64_t make_address_pc(DisasContext *ctx, uint64_t addr) { + if (ctx->va32) { + addr = (int32_t)addr; + } return addr; }