target/*helper: don't check retaddr before calling cpu_restore_state
cpu_restore_state officially supports being passed an address it can't resolve the state for. As a result the checks in the helpers are superfluous and can be removed. This makes the code consistent with other users of cpu_restore_state. Of course this does nothing to address what to do if cpu_restore_state can't resolve the state but so far it seems this is handled elsewhere. The change was made with included coccinelle script. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> [rth: Fixed up comment indentation. Added second hunk to script to combine cpu_restore_state and cpu_loop_exit.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
281f327487
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65255e8efd
19
scripts/coccinelle/cpu_restore_state.cocci
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19
scripts/coccinelle/cpu_restore_state.cocci
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@ -0,0 +1,19 @@
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// Remove unneeded tests before calling cpu_restore_state
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//
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// spatch --macro-file scripts/cocci-macro-file.h \
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// --sp-file ./scripts/coccinelle/cpu_restore_state.cocci \
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// --keep-comments --in-place --use-gitgrep --dir target
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@@
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expression A;
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expression C;
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@@
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-if (A) {
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cpu_restore_state(C, A);
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-}
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@@
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expression A;
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expression C;
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@@
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- cpu_restore_state(C, A);
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- cpu_loop_exit(C);
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+ cpu_loop_exit_restore(C, A);
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@ -34,9 +34,7 @@ void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
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uint64_t pc;
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uint64_t pc;
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uint32_t insn;
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uint32_t insn;
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if (retaddr) {
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cpu_restore_state(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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pc = env->pc;
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pc = env->pc;
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insn = cpu_ldl_code(env, pc);
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insn = cpu_ldl_code(env, pc);
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@ -58,9 +56,7 @@ void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
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AlphaCPU *cpu = ALPHA_CPU(cs);
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AlphaCPU *cpu = ALPHA_CPU(cs);
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CPUAlphaState *env = &cpu->env;
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CPUAlphaState *env = &cpu->env;
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if (retaddr) {
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cpu_restore_state(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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env->trap_arg0 = addr;
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env->trap_arg0 = addr;
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env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0;
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env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0;
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@ -80,11 +76,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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ret = alpha_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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ret = alpha_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (unlikely(ret != 0)) {
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if (unlikely(ret != 0)) {
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if (retaddr) {
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cpu_restore_state(cs, retaddr);
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}
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/* Exception index and error code are already set */
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/* Exception index and error code are already set */
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cpu_loop_exit(cs);
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cpu_loop_exit_restore(cs, retaddr);
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}
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}
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}
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}
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#endif /* CONFIG_USER_ONLY */
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#endif /* CONFIG_USER_ONLY */
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@ -182,10 +182,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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if (unlikely(ret)) {
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if (unlikely(ret)) {
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ARMCPU *cpu = ARM_CPU(cs);
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ARMCPU *cpu = ARM_CPU(cs);
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if (retaddr) {
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/* now we have a real cpu fault */
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/* now we have a real cpu fault */
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cpu_restore_state(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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deliver_fault(cpu, addr, access_type, mmu_idx, &fi);
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deliver_fault(cpu, addr, access_type, mmu_idx, &fi);
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}
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}
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@ -199,10 +197,8 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
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ARMCPU *cpu = ARM_CPU(cs);
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ARMCPU *cpu = ARM_CPU(cs);
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ARMMMUFaultInfo fi = {};
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ARMMMUFaultInfo fi = {};
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if (retaddr) {
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/* now we have a real cpu fault */
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/* now we have a real cpu fault */
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cpu_restore_state(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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fi.type = ARMFault_Alignment;
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fi.type = ARMFault_Alignment;
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deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
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deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
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@ -221,10 +217,8 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
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ARMCPU *cpu = ARM_CPU(cs);
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ARMCPU *cpu = ARM_CPU(cs);
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ARMMMUFaultInfo fi = {};
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ARMMMUFaultInfo fi = {};
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if (retaddr) {
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/* now we have a real cpu fault */
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/* now we have a real cpu fault */
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cpu_restore_state(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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/* The EA bit in syndromes and fault status registers is an
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/* The EA bit in syndromes and fault status registers is an
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* IMPDEF classification of external aborts. ARM implementations
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* IMPDEF classification of external aborts. ARM implementations
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@ -584,9 +584,7 @@ void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1,
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{
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{
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CPUState *cs = CPU(x86_env_get_cpu(env));
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CPUState *cs = CPU(x86_env_get_cpu(env));
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if (retaddr) {
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cpu_restore_state(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016"
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qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016"
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PRIx64 ", " TARGET_FMT_lx ")!\n",
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PRIx64 ", " TARGET_FMT_lx ")!\n",
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@ -151,11 +151,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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ret = lm32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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ret = lm32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (unlikely(ret)) {
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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/* now we have a real cpu fault */
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cpu_loop_exit_restore(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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cpu_loop_exit(cs);
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}
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}
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}
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}
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#endif
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#endif
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@ -46,11 +46,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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ret = m68k_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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ret = m68k_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (unlikely(ret)) {
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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/* now we have a real cpu fault */
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cpu_loop_exit_restore(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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cpu_loop_exit(cs);
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}
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}
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}
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}
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@ -40,11 +40,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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ret = mb_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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ret = mb_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (unlikely(ret)) {
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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/* now we have a real cpu fault */
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cpu_loop_exit_restore(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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cpu_loop_exit(cs);
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}
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}
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}
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}
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#endif
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#endif
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@ -36,9 +36,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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ret = moxie_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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ret = moxie_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (unlikely(ret)) {
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if (unlikely(ret)) {
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if (retaddr) {
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cpu_restore_state(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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}
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}
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cpu_loop_exit(cs);
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cpu_loop_exit(cs);
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}
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}
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@ -42,11 +42,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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ret = nios2_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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ret = nios2_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (unlikely(ret)) {
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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/* now we have a real cpu fault */
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cpu_loop_exit_restore(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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cpu_loop_exit(cs);
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}
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}
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}
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}
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@ -33,12 +33,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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ret = openrisc_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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ret = openrisc_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (ret) {
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if (ret) {
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if (retaddr) {
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/* now we have a real cpu fault. */
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cpu_restore_state(cs, retaddr);
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}
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/* Raise Exception. */
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/* Raise Exception. */
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cpu_loop_exit(cs);
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cpu_loop_exit_restore(cs, retaddr);
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}
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}
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}
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}
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#endif
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#endif
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@ -31,9 +31,7 @@ raise_exception_sync_internal(CPUTriCoreState *env, uint32_t class, int tin,
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{
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{
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CPUState *cs = CPU(tricore_env_get_cpu(env));
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CPUState *cs = CPU(tricore_env_get_cpu(env));
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/* in case we come from a helper-call we need to restore the PC */
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/* in case we come from a helper-call we need to restore the PC */
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if (pc) {
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cpu_restore_state(cs, pc);
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cpu_restore_state(cs, pc);
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}
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/* Tin is loaded into d[15] */
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/* Tin is loaded into d[15] */
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env->gpr_d[15] = tin;
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env->gpr_d[15] = tin;
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@ -2804,13 +2802,8 @@ static inline void QEMU_NORETURN do_raise_exception_err(CPUTriCoreState *env,
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CPUState *cs = CPU(tricore_env_get_cpu(env));
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CPUState *cs = CPU(tricore_env_get_cpu(env));
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cs->exception_index = exception;
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cs->exception_index = exception;
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env->error_code = error_code;
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env->error_code = error_code;
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/* now we have a real cpu fault */
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if (pc) {
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cpu_loop_exit_restore(cs, pc);
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/* now we have a real cpu fault */
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cpu_restore_state(cs, pc);
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}
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cpu_loop_exit(cs);
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}
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}
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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@ -251,11 +251,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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ret = uc32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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ret = uc32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (unlikely(ret)) {
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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/* now we have a real cpu fault */
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cpu_loop_exit_restore(cs, retaddr);
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cpu_restore_state(cs, retaddr);
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}
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cpu_loop_exit(cs);
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}
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}
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}
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}
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#endif
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#endif
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