target/*helper: don't check retaddr before calling cpu_restore_state

cpu_restore_state officially supports being passed an address it can't
resolve the state for. As a result the checks in the helpers are
superfluous and can be removed. This makes the code consistent with
other users of cpu_restore_state.

Of course this does nothing to address what to do if cpu_restore_state
can't resolve the state but so far it seems this is handled elsewhere.

The change was made with included coccinelle script.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
[rth: Fixed up comment indentation.  Added second hunk to script to
combine cpu_restore_state and cpu_loop_exit.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Alex Bennée 2017-11-14 11:25:35 +01:00 committed by Richard Henderson
parent 281f327487
commit 65255e8efd
12 changed files with 44 additions and 68 deletions

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@ -0,0 +1,19 @@
// Remove unneeded tests before calling cpu_restore_state
//
// spatch --macro-file scripts/cocci-macro-file.h \
// --sp-file ./scripts/coccinelle/cpu_restore_state.cocci \
// --keep-comments --in-place --use-gitgrep --dir target
@@
expression A;
expression C;
@@
-if (A) {
cpu_restore_state(C, A);
-}
@@
expression A;
expression C;
@@
- cpu_restore_state(C, A);
- cpu_loop_exit(C);
+ cpu_loop_exit_restore(C, A);

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@ -34,9 +34,7 @@ void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
uint64_t pc; uint64_t pc;
uint32_t insn; uint32_t insn;
if (retaddr) { cpu_restore_state(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
pc = env->pc; pc = env->pc;
insn = cpu_ldl_code(env, pc); insn = cpu_ldl_code(env, pc);
@ -58,9 +56,7 @@ void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
AlphaCPU *cpu = ALPHA_CPU(cs); AlphaCPU *cpu = ALPHA_CPU(cs);
CPUAlphaState *env = &cpu->env; CPUAlphaState *env = &cpu->env;
if (retaddr) { cpu_restore_state(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
env->trap_arg0 = addr; env->trap_arg0 = addr;
env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0; env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0;
@ -80,11 +76,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
ret = alpha_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); ret = alpha_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
if (unlikely(ret != 0)) { if (unlikely(ret != 0)) {
if (retaddr) {
cpu_restore_state(cs, retaddr);
}
/* Exception index and error code are already set */ /* Exception index and error code are already set */
cpu_loop_exit(cs); cpu_loop_exit_restore(cs, retaddr);
} }
} }
#endif /* CONFIG_USER_ONLY */ #endif /* CONFIG_USER_ONLY */

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@ -182,10 +182,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
if (unlikely(ret)) { if (unlikely(ret)) {
ARMCPU *cpu = ARM_CPU(cs); ARMCPU *cpu = ARM_CPU(cs);
if (retaddr) { /* now we have a real cpu fault */
/* now we have a real cpu fault */ cpu_restore_state(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
deliver_fault(cpu, addr, access_type, mmu_idx, &fi); deliver_fault(cpu, addr, access_type, mmu_idx, &fi);
} }
@ -199,10 +197,8 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
ARMCPU *cpu = ARM_CPU(cs); ARMCPU *cpu = ARM_CPU(cs);
ARMMMUFaultInfo fi = {}; ARMMMUFaultInfo fi = {};
if (retaddr) { /* now we have a real cpu fault */
/* now we have a real cpu fault */ cpu_restore_state(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
fi.type = ARMFault_Alignment; fi.type = ARMFault_Alignment;
deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi); deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
@ -221,10 +217,8 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
ARMCPU *cpu = ARM_CPU(cs); ARMCPU *cpu = ARM_CPU(cs);
ARMMMUFaultInfo fi = {}; ARMMMUFaultInfo fi = {};
if (retaddr) { /* now we have a real cpu fault */
/* now we have a real cpu fault */ cpu_restore_state(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
/* The EA bit in syndromes and fault status registers is an /* The EA bit in syndromes and fault status registers is an
* IMPDEF classification of external aborts. ARM implementations * IMPDEF classification of external aborts. ARM implementations

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@ -584,9 +584,7 @@ void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1,
{ {
CPUState *cs = CPU(x86_env_get_cpu(env)); CPUState *cs = CPU(x86_env_get_cpu(env));
if (retaddr) { cpu_restore_state(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016" qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016"
PRIx64 ", " TARGET_FMT_lx ")!\n", PRIx64 ", " TARGET_FMT_lx ")!\n",

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@ -151,11 +151,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
ret = lm32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); ret = lm32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
if (unlikely(ret)) { if (unlikely(ret)) {
if (retaddr) { /* now we have a real cpu fault */
/* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
} }
} }
#endif #endif

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@ -46,11 +46,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
ret = m68k_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); ret = m68k_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
if (unlikely(ret)) { if (unlikely(ret)) {
if (retaddr) { /* now we have a real cpu fault */
/* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
} }
} }

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@ -40,11 +40,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
ret = mb_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); ret = mb_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
if (unlikely(ret)) { if (unlikely(ret)) {
if (retaddr) { /* now we have a real cpu fault */
/* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
} }
} }
#endif #endif

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@ -36,9 +36,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
ret = moxie_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); ret = moxie_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
if (unlikely(ret)) { if (unlikely(ret)) {
if (retaddr) { cpu_restore_state(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
} }
cpu_loop_exit(cs); cpu_loop_exit(cs);
} }

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@ -42,11 +42,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
ret = nios2_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); ret = nios2_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
if (unlikely(ret)) { if (unlikely(ret)) {
if (retaddr) { /* now we have a real cpu fault */
/* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
} }
} }

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@ -33,12 +33,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
ret = openrisc_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); ret = openrisc_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
if (ret) { if (ret) {
if (retaddr) {
/* now we have a real cpu fault. */
cpu_restore_state(cs, retaddr);
}
/* Raise Exception. */ /* Raise Exception. */
cpu_loop_exit(cs); cpu_loop_exit_restore(cs, retaddr);
} }
} }
#endif #endif

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@ -31,9 +31,7 @@ raise_exception_sync_internal(CPUTriCoreState *env, uint32_t class, int tin,
{ {
CPUState *cs = CPU(tricore_env_get_cpu(env)); CPUState *cs = CPU(tricore_env_get_cpu(env));
/* in case we come from a helper-call we need to restore the PC */ /* in case we come from a helper-call we need to restore the PC */
if (pc) { cpu_restore_state(cs, pc);
cpu_restore_state(cs, pc);
}
/* Tin is loaded into d[15] */ /* Tin is loaded into d[15] */
env->gpr_d[15] = tin; env->gpr_d[15] = tin;
@ -2804,13 +2802,8 @@ static inline void QEMU_NORETURN do_raise_exception_err(CPUTriCoreState *env,
CPUState *cs = CPU(tricore_env_get_cpu(env)); CPUState *cs = CPU(tricore_env_get_cpu(env));
cs->exception_index = exception; cs->exception_index = exception;
env->error_code = error_code; env->error_code = error_code;
/* now we have a real cpu fault */
if (pc) { cpu_loop_exit_restore(cs, pc);
/* now we have a real cpu fault */
cpu_restore_state(cs, pc);
}
cpu_loop_exit(cs);
} }
void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,

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@ -251,11 +251,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
ret = uc32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); ret = uc32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
if (unlikely(ret)) { if (unlikely(ret)) {
if (retaddr) { /* now we have a real cpu fault */
/* now we have a real cpu fault */ cpu_loop_exit_restore(cs, retaddr);
cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
} }
} }
#endif #endif