hw/mips/gt64xxx_pci: Accumulate address space changes
Single registers access in ISD can produce multiple changes in the address spaces. To reduce computational effort, accumulate these as a single memory transaction. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230104133935.4639-5-philmd@linaro.org>
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@ -282,6 +282,8 @@ static void gt64120_isd_mapping(GT64120State *s)
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hwaddr start = ((hwaddr)s->regs[GT_ISD] << 21) & 0xFFFE00000ull;
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hwaddr length = 0x1000;
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memory_region_transaction_begin();
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if (s->ISD_length) {
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memory_region_del_subregion(get_system_memory(), &s->ISD_mem);
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}
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@ -292,10 +294,14 @@ static void gt64120_isd_mapping(GT64120State *s)
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s->ISD_start = start;
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s->ISD_length = length;
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memory_region_add_subregion(get_system_memory(), s->ISD_start, &s->ISD_mem);
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memory_region_transaction_commit();
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}
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static void gt64120_pci_mapping(GT64120State *s)
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{
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memory_region_transaction_begin();
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/* Update PCI0IO mapping */
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if ((s->regs[GT_PCI0IOLD] & 0x7f) <= s->regs[GT_PCI0IOHD]) {
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/* Unmap old IO address */
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@ -354,6 +360,8 @@ static void gt64120_pci_mapping(GT64120State *s)
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&s->PCI0M1_mem);
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}
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}
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memory_region_transaction_commit();
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}
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static int gt64120_post_load(void *opaque, int version_id)
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