arm: Add header to host common definition for nRF51 SOC peripherals
Adds a header that provides definitions that are used across nRF51 peripherals Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 20190103091119.9367-3-stefanha@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -21,27 +21,16 @@
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#include "qemu/log.h"
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#include "qemu/log.h"
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#include "cpu.h"
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#include "cpu.h"
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#include "hw/arm/nrf51.h"
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#include "hw/arm/nrf51_soc.h"
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#include "hw/arm/nrf51_soc.h"
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#define IOMEM_BASE 0x40000000
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#define IOMEM_SIZE 0x20000000
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#define FICR_BASE 0x10000000
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#define FICR_SIZE 0x000000fc
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#define FLASH_BASE 0x00000000
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#define SRAM_BASE 0x20000000
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#define PRIVATE_BASE 0xF0000000
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#define PRIVATE_SIZE 0x10000000
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/*
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/*
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* The size and base is for the NRF51822 part. If other parts
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* The size and base is for the NRF51822 part. If other parts
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* are supported in the future, add a sub-class of NRF51SoC for
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* are supported in the future, add a sub-class of NRF51SoC for
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* the specific variants
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* the specific variants
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*/
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*/
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#define NRF51822_FLASH_SIZE (256 * 1024)
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#define NRF51822_FLASH_SIZE (256 * NRF51_PAGE_SIZE)
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#define NRF51822_SRAM_SIZE (16 * 1024)
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#define NRF51822_SRAM_SIZE (16 * NRF51_PAGE_SIZE)
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#define BASE_TO_IRQ(base) ((base >> 12) & 0x1F)
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#define BASE_TO_IRQ(base) ((base >> 12) & 0x1F)
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@ -76,14 +65,14 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
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error_propagate(errp, err);
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error_propagate(errp, err);
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return;
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return;
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}
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}
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memory_region_add_subregion(&s->container, FLASH_BASE, &s->flash);
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memory_region_add_subregion(&s->container, NRF51_FLASH_BASE, &s->flash);
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memory_region_init_ram(&s->sram, NULL, "nrf51.sram", s->sram_size, &err);
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memory_region_init_ram(&s->sram, NULL, "nrf51.sram", s->sram_size, &err);
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if (err) {
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if (err) {
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error_propagate(errp, err);
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error_propagate(errp, err);
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return;
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return;
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}
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}
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memory_region_add_subregion(&s->container, SRAM_BASE, &s->sram);
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memory_region_add_subregion(&s->container, NRF51_SRAM_BASE, &s->sram);
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/* UART */
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/* UART */
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object_property_set_bool(OBJECT(&s->uart), true, "realized", &err);
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object_property_set_bool(OBJECT(&s->uart), true, "realized", &err);
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@ -92,15 +81,17 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
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return;
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return;
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}
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}
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart), 0);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart), 0);
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memory_region_add_subregion_overlap(&s->container, UART_BASE, mr, 0);
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memory_region_add_subregion_overlap(&s->container, NRF51_UART_BASE, mr, 0);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 0,
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 0,
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qdev_get_gpio_in(DEVICE(&s->cpu),
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qdev_get_gpio_in(DEVICE(&s->cpu),
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BASE_TO_IRQ(UART_BASE)));
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BASE_TO_IRQ(NRF51_UART_BASE)));
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create_unimplemented_device("nrf51_soc.io", IOMEM_BASE, IOMEM_SIZE);
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create_unimplemented_device("nrf51_soc.io", NRF51_IOMEM_BASE,
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create_unimplemented_device("nrf51_soc.ficr", FICR_BASE, FICR_SIZE);
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NRF51_IOMEM_SIZE);
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create_unimplemented_device("nrf51_soc.ficr", NRF51_FICR_BASE,
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NRF51_FICR_SIZE);
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create_unimplemented_device("nrf51_soc.private",
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create_unimplemented_device("nrf51_soc.private",
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PRIVATE_BASE, PRIVATE_SIZE);
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NRF51_PRIVATE_BASE, NRF51_PRIVATE_SIZE);
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}
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}
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static void nrf51_soc_init(Object *obj)
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static void nrf51_soc_init(Object *obj)
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45
include/hw/arm/nrf51.h
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45
include/hw/arm/nrf51.h
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@ -0,0 +1,45 @@
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/*
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* Nordic Semiconductor nRF51 Series SOC Common Defines
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*
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* This file hosts generic defines used in various nRF51 peripheral devices.
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*
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* Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
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* Product Spec: http://infocenter.nordicsemi.com/pdf/nRF51822_PS_v3.1.pdf
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*
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* Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
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*
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* This code is licensed under the GPL version 2 or later. See
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* the COPYING file in the top-level directory.
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*/
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#ifndef NRF51_H
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#define NRF51_H
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#define NRF51_FLASH_BASE 0x00000000
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#define NRF51_FICR_BASE 0x10000000
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#define NRF51_FICR_SIZE 0x00000100
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#define NRF51_UICR_BASE 0x10001000
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#define NRF51_SRAM_BASE 0x20000000
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#define NRF51_IOMEM_BASE 0x40000000
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#define NRF51_IOMEM_SIZE 0x20000000
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#define NRF51_UART_BASE 0x40002000
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#define NRF51_TIMER_BASE 0x40008000
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#define NRF51_TIMER_SIZE 0x00001000
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#define NRF51_RNG_BASE 0x4000D000
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#define NRF51_NVMC_BASE 0x4001E000
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#define NRF51_GPIO_BASE 0x50000000
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#define NRF51_PRIVATE_BASE 0xF0000000
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#define NRF51_PRIVATE_SIZE 0x10000000
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#define NRF51_PAGE_SIZE 1024
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/* Trigger */
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#define NRF51_TRIGGER_TASK 0x01
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/* Events */
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#define NRF51_EVENT_CLEAR 0x00
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#endif
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@ -16,7 +16,6 @@
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#include "hw/registerfields.h"
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#include "hw/registerfields.h"
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#define UART_FIFO_LENGTH 6
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#define UART_FIFO_LENGTH 6
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#define UART_BASE 0x40002000
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#define UART_SIZE 0x1000
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#define UART_SIZE 0x1000
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#define TYPE_NRF51_UART "nrf51_soc.uart"
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#define TYPE_NRF51_UART "nrf51_soc.uart"
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