typofixes - v4
Signed-off-by: Veres Lajos <vlajos@gmail.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
parent
33b23b4b5e
commit
67cc32ebfd
@ -357,7 +357,7 @@ fetch_data(struct disassemble_info *info, bfd_byte *addr)
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#define Rd { OP_R, d_mode }
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#define Rd { OP_R, d_mode }
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#define Rm { OP_R, m_mode }
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#define Rm { OP_R, m_mode }
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#define Ib { OP_I, b_mode }
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#define Ib { OP_I, b_mode }
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#define sIb { OP_sI, b_mode } /* sign extened byte */
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#define sIb { OP_sI, b_mode } /* sign extended byte */
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#define Iv { OP_I, v_mode }
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#define Iv { OP_I, v_mode }
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#define Iq { OP_I, q_mode }
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#define Iq { OP_I, q_mode }
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#define Iv64 { OP_I64, v_mode }
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#define Iv64 { OP_I64, v_mode }
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@ -613,7 +613,7 @@ static const struct s390_operand s390_operands[] =
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names of the instruction format that you can find in the principals
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names of the instruction format that you can find in the principals
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of operation.
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of operation.
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2) the last part of the definition (y in INSTR_x_y) gives you an idea
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2) the last part of the definition (y in INSTR_x_y) gives you an idea
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which operands the binary represenation of the instruction has.
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which operands the binary representation of the instruction has.
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The meanings of the letters in y are:
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The meanings of the letters in y are:
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a - access register
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a - access register
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c - control register
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c - control register
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@ -627,7 +627,7 @@ static const struct s390_operand s390_operands[] =
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m - mode field, 4 bit
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m - mode field, 4 bit
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0 - operand skipped.
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0 - operand skipped.
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The order of the letters reflects the layout of the format in
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The order of the letters reflects the layout of the format in
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storage and not the order of the paramaters of the instructions.
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storage and not the order of the parameters of the instructions.
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The use of the letters is not a 100% match with the PoP but it is
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The use of the letters is not a 100% match with the PoP but it is
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quite close.
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quite close.
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@ -41,8 +41,8 @@ When the guest runs in "real mode" (in powerpc lingua this means
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with MMU disabled, ie guest effective == guest physical), it only
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with MMU disabled, ie guest effective == guest physical), it only
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has access to a subset of memory and no IOs.
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has access to a subset of memory and no IOs.
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PAPR provides a set of hypervisor calls to perform cachable or
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PAPR provides a set of hypervisor calls to perform cacheable or
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non-cachable accesses to any guest physical addresses that the
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non-cacheable accesses to any guest physical addresses that the
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guest can use in order to access IO devices while in real mode.
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guest can use in order to access IO devices while in real mode.
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This is typically used by the firmware running in the guest.
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This is typically used by the firmware running in the guest.
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@ -122,7 +122,7 @@ There are a few things to be noticed:
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Now a little hack is needed. As we're still using the old QMP server we need
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Now a little hack is needed. As we're still using the old QMP server we need
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to add the new command to its internal dispatch table. This step won't be
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to add the new command to its internal dispatch table. This step won't be
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required in the near future. Open the qmp-commands.hx file and add the
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required in the near future. Open the qmp-commands.hx file and add the
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following in the botton:
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following at the bottom:
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{
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{
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.name = "hello-world",
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.name = "hello-world",
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@ -1177,7 +1177,7 @@ void OPLResetChip(FM_OPL *OPL)
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OPLWriteReg(OPL,0x03,0); /* Timer2 */
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OPLWriteReg(OPL,0x03,0); /* Timer2 */
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OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */
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OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */
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for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0);
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for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0);
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/* reset OPerator paramater */
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/* reset operator parameter */
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for( c = 0 ; c < OPL->max_ch ; c++ )
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for( c = 0 ; c < OPL->max_ch ; c++ )
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{
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{
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OPL_CH *CH = &OPL->P_CH[c];
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OPL_CH *CH = &OPL->P_CH[c];
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@ -506,7 +506,7 @@ qemu_irq qdev_get_gpio_out_connector(DeviceState *dev, const char *name, int n)
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return ret;
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return ret;
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}
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}
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/* disconnect a GPIO ouput, returning the disconnected input (if any) */
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/* disconnect a GPIO output, returning the disconnected input (if any) */
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static qemu_irq qdev_disconnect_gpio_out_named(DeviceState *dev,
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static qemu_irq qdev_disconnect_gpio_out_named(DeviceState *dev,
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const char *name, int n)
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const char *name, int n)
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@ -138,7 +138,7 @@ static void tempsensor_clkedge(struct tempsensor_t *s,
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s->count = 16;
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s->count = 16;
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if ((s->regs[0] & 0xff) == 0) {
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if ((s->regs[0] & 0xff) == 0) {
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/* 25 degrees celcius. */
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/* 25 degrees celsius. */
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s->shiftreg = 0x0b9f;
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s->shiftreg = 0x0b9f;
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} else if ((s->regs[0] & 0xff) == 0xff) {
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} else if ((s->regs[0] & 0xff) == 0xff) {
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/* Sensor ID, 0x8100 LM70. */
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/* Sensor ID, 0x8100 LM70. */
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@ -159,7 +159,7 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl)
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/*
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/*
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* use ssd.lock to protect render_update_cookie_num.
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* use ssd.lock to protect render_update_cookie_num.
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* qxl_render_update is called by io thread or vcpu thread, and the completion
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* qxl_render_update is called by io thread or vcpu thread, and the completion
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* callbacks are called by spice_server thread, defering to bh called from the
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* callbacks are called by spice_server thread, deferring to bh called from the
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* io thread.
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* io thread.
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*/
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*/
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void qxl_render_update(PCIQXLDevice *qxl)
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void qxl_render_update(PCIQXLDevice *qxl)
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@ -133,7 +133,7 @@ struct XilinxAXIDMA {
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};
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};
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/*
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/*
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* Helper calls to extract info from desriptors and other trivial
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* Helper calls to extract info from descriptors and other trivial
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* state from regs.
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* state from regs.
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*/
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*/
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static inline int stream_desc_sof(struct SDesc *d)
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static inline int stream_desc_sof(struct SDesc *d)
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@ -69,7 +69,7 @@ static const VMStateDescription vmstate_stellaris_gamepad = {
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}
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}
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};
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};
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/* Returns an array 5 ouput slots. */
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/* Returns an array of 5 output slots. */
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void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode)
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void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode)
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{
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{
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gamepad_state *s;
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gamepad_state *s;
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@ -739,7 +739,7 @@ int xics_alloc(XICSState *icp, int src, int irq_hint, bool lsi)
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}
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}
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/*
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/*
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* Allocate block of consequtive IRQs, returns a number of the first.
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* Allocate block of consecutive IRQs, and return the number of the first IRQ in the block.
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* If align==true, aligns the first IRQ number to num.
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* If align==true, aligns the first IRQ number to num.
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*/
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*/
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int xics_alloc_block(XICSState *icp, int src, int num, bool lsi, bool align)
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int xics_alloc_block(XICSState *icp, int src, int num, bool lsi, bool align)
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@ -353,7 +353,7 @@ static ssize_t etsec_receive(NetClientState *nc,
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etsec->need_flush = false;
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etsec->need_flush = false;
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ret = etsec_rx_ring_write(etsec, buf, size);
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ret = etsec_rx_ring_write(etsec, buf, size);
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if (ret == 0) {
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if (ret == 0) {
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/* The packet will be queued, let's flush it when buffer is avilable
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/* The packet will be queued, let's flush it when buffer is available
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* again. */
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* again. */
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etsec->need_flush = true;
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etsec->need_flush = true;
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}
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}
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@ -46,7 +46,7 @@ typedef struct PL181State {
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int32_t fifo_pos;
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int32_t fifo_pos;
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int32_t fifo_len;
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int32_t fifo_len;
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/* The linux 2.6.21 driver is buggy, and misbehaves if new data arrives
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/* The linux 2.6.21 driver is buggy, and misbehaves if new data arrives
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while it is reading the FIFO. We hack around this be defering
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while it is reading the FIFO. We hack around this by deferring
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subsequent transfers until after the driver polls the status word.
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subsequent transfers until after the driver polls the status word.
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http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=4446/1
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http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=4446/1
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*/
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*/
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@ -3377,7 +3377,7 @@ static bool vfio_radeon_smc_is_running(VFIOPCIDevice *vdev)
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uint32_t clk, pc_c;
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uint32_t clk, pc_c;
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/*
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/*
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* Registers 200h and 204h are index and data registers for acessing
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* Registers 200h and 204h are index and data registers for accessing
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* indirect configuration registers within the device.
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* indirect configuration registers within the device.
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*/
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*/
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vfio_region_write(&vdev->bars[5].region, 0x200, 0x80000004, 4);
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vfio_region_write(&vdev->bars[5].region, 0x200, 0x80000004, 4);
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@ -40,7 +40,7 @@ static int xen_host_pci_sysfs_path(const XenHostPCIDevice *d,
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d->domain, d->bus, d->dev, d->func, name);
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d->domain, d->bus, d->dev, d->func, name);
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if (rc >= size || rc < 0) {
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if (rc >= size || rc < 0) {
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/* The ouput is truncated or an other error is encountered */
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/* The output is truncated, or some other error was encountered */
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return -ENODEV;
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return -ENODEV;
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}
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}
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return 0;
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return 0;
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@ -229,7 +229,7 @@ const char *scsi_command_name(uint8_t cmd);
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#define MODE_PAGE_TO_PROTECT 0x1d
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#define MODE_PAGE_TO_PROTECT 0x1d
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#define MODE_PAGE_CAPABILITIES 0x2a
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#define MODE_PAGE_CAPABILITIES 0x2a
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#define MODE_PAGE_ALLS 0x3f
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#define MODE_PAGE_ALLS 0x3f
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/* Not in Mt. Fuji, but in ATAPI 2.6 -- depricated now in favor
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/* Not in Mt. Fuji, but in ATAPI 2.6 -- deprecated now in favor
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* of MODE_PAGE_SENSE_POWER */
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* of MODE_PAGE_SENSE_POWER */
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#define MODE_PAGE_CDROM 0x0d
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#define MODE_PAGE_CDROM 0x0d
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@ -1146,7 +1146,7 @@ MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
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* address_space_init: initializes an address space
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* address_space_init: initializes an address space
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*
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*
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* @as: an uninitialized #AddressSpace
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* @as: an uninitialized #AddressSpace
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* @root: a #MemoryRegion that routes addesses for the address space
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* @root: a #MemoryRegion that routes addresses for the address space
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* @name: an address space name. The name is only used for debugging
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* @name: an address space name. The name is only used for debugging
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* output.
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* output.
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*/
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*/
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@ -57,7 +57,7 @@ struct VCardAPDUHeader {
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unsigned char ah_p1;
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unsigned char ah_p1;
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unsigned char ah_p2;
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unsigned char ah_p2;
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unsigned char ah_Le;
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unsigned char ah_Le;
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unsigned char ah_body[1]; /* indefinate length */
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unsigned char ah_body[1]; /* indefinite length */
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};
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};
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/*
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/*
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@ -186,7 +186,7 @@ uInt decContextGetStatus(decContext *context) {
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/* newstatus is the source for the bits to be restored */
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/* newstatus is the source for the bits to be restored */
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/* mask indicates the bits to be restored (the status bit that */
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/* mask indicates the bits to be restored (the status bit that */
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/* corresponds to each 1 bit in the mask is set to the value of */
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/* corresponds to each 1 bit in the mask is set to the value of */
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/* the correspnding bit in newstatus) */
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/* the corresponding bit in newstatus) */
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/* returns context */
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/* returns context */
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/* */
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/* */
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/* No error is possible. */
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/* No error is possible. */
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@ -2238,7 +2238,7 @@ decNumber * decNumberPower(decNumber *res, const decNumber *lhs,
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/* if a negative power the constant 1 is needed, and if not subset */
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/* if a negative power the constant 1 is needed, and if not subset */
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/* invert the lhs now rather than inverting the result later */
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/* invert the lhs now rather than inverting the result later */
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if (decNumberIsNegative(rhs)) { /* was a **-n [hence digits>0] */
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if (decNumberIsNegative(rhs)) { /* was a **-n [hence digits>0] */
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decNumber *inv=invbuff; /* asssume use fixed buffer */
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decNumber *inv=invbuff; /* assume use fixed buffer */
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decNumberCopy(&dnOne, dac); /* dnOne=1; [needed now or later] */
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decNumberCopy(&dnOne, dac); /* dnOne=1; [needed now or later] */
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#if DECSUBSET
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#if DECSUBSET
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if (set->extended) { /* need to calculate 1/lhs */
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if (set->extended) { /* need to calculate 1/lhs */
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@ -3849,7 +3849,7 @@ static void decToString(const decNumber *dn, char *string, Flag eng) {
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/* */
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/* */
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/* Addition, especially x=x+1, is speed-critical. */
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/* Addition, especially x=x+1, is speed-critical. */
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/* The static buffer is larger than might be expected to allow for */
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/* The static buffer is larger than might be expected to allow for */
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/* calls from higher-level funtions (notable exp). */
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/* calls from higher-level functions (notably exp). */
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/* ------------------------------------------------------------------ */
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/* ------------------------------------------------------------------ */
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static decNumber * decAddOp(decNumber *res, const decNumber *lhs,
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static decNumber * decAddOp(decNumber *res, const decNumber *lhs,
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const decNumber *rhs, decContext *set,
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const decNumber *rhs, decContext *set,
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@ -4263,7 +4263,7 @@ static decNumber * decAddOp(decNumber *res, const decNumber *lhs,
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/* long subtractions. These are acc and var1 respectively. */
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/* long subtractions. These are acc and var1 respectively. */
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/* var1 is a copy of the lhs coefficient, var2 is the rhs coefficient.*/
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/* var1 is a copy of the lhs coefficient, var2 is the rhs coefficient.*/
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/* The static buffers may be larger than might be expected to allow */
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/* The static buffers may be larger than might be expected to allow */
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/* for calls from higher-level funtions (notable exp). */
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/* for calls from higher-level functions (notably exp). */
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/* ------------------------------------------------------------------ */
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/* ------------------------------------------------------------------ */
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static decNumber * decDivideOp(decNumber *res,
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static decNumber * decDivideOp(decNumber *res,
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const decNumber *lhs, const decNumber *rhs,
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const decNumber *lhs, const decNumber *rhs,
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@ -5254,7 +5254,7 @@ static decNumber * decMultiplyOp(decNumber *res, const decNumber *lhs,
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/* exp(-x) where x can be the tiniest number (Ntiny). */
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/* exp(-x) where x can be the tiniest number (Ntiny). */
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/* */
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/* */
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/* 2. Normalizing x to be <=0.1 (instead of <=1) reduces loop */
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/* 2. Normalizing x to be <=0.1 (instead of <=1) reduces loop */
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/* iterations by appoximately a third with additional (although */
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/* iterations by approximately a third with additional (although */
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/* diminishing) returns as the range is reduced to even smaller */
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/* diminishing) returns as the range is reduced to even smaller */
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/* fractions. However, h (the power of 10 used to correct the */
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/* fractions. However, h (the power of 10 used to correct the */
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/* result at the end, see below) must be kept <=8 as otherwise */
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/* result at the end, see below) must be kept <=8 as otherwise */
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@ -3939,7 +3939,6 @@ static abi_long do_ioctl(int fd, int cmd, abi_long arg)
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break;
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break;
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case TYPE_PTRVOID:
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case TYPE_PTRVOID:
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case TYPE_INT:
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case TYPE_INT:
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/* int argment */
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ret = get_errno(ioctl(fd, ie->host_cmd, arg));
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ret = get_errno(ioctl(fd, ie->host_cmd, arg));
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break;
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break;
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case TYPE_PTR:
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case TYPE_PTR:
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@ -969,7 +969,7 @@ struct target_pollfd {
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(struct cdrom_multisession) */
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(struct cdrom_multisession) */
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#define TARGET_CDROM_GET_MCN 0x5311 /* Obtain the "Universal Product Code"
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#define TARGET_CDROM_GET_MCN 0x5311 /* Obtain the "Universal Product Code"
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if available (struct cdrom_mcn) */
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if available (struct cdrom_mcn) */
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#define TARGET_CDROM_GET_UPC TARGET_CDROM_GET_MCN /* This one is depricated,
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#define TARGET_CDROM_GET_UPC TARGET_CDROM_GET_MCN /* This one is deprecated,
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but here anyway for compatibility */
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but here anyway for compatibility */
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#define TARGET_CDROMRESET 0x5312 /* hard-reset the drive */
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#define TARGET_CDROMRESET 0x5312 /* hard-reset the drive */
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#define TARGET_CDROMVOLREAD 0x5313 /* Get the drive's volume setting
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#define TARGET_CDROMVOLREAD 0x5313 /* Get the drive's volume setting
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@ -2289,7 +2289,7 @@ struct target_f_owner_ex {
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};
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};
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/* soundcard defines */
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/* soundcard defines */
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/* XXX: convert them all to arch indepedent entries */
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/* XXX: convert them all to arch independent entries */
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#define TARGET_SNDCTL_COPR_HALT TARGET_IOWR('C', 7, int);
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#define TARGET_SNDCTL_COPR_HALT TARGET_IOWR('C', 7, int);
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#define TARGET_SNDCTL_COPR_LOAD 0xcfb04301
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#define TARGET_SNDCTL_COPR_LOAD 0xcfb04301
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#define TARGET_SNDCTL_COPR_RCODE 0xc0144303
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#define TARGET_SNDCTL_COPR_RCODE 0xc0144303
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@ -2158,7 +2158,7 @@ static void transfer_memory_block(GuestMemoryBlock *mem_blk, bool sys2memblk,
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ga_read_sysfs_file(dirfd, "removable", &removable, 1, &local_err);
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ga_read_sysfs_file(dirfd, "removable", &removable, 1, &local_err);
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if (local_err) {
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if (local_err) {
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/* if no 'removable' file, it does't support offline mem blk */
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/* if no 'removable' file, it doesn't support offline mem blk */
|
||||||
if (errno == ENOENT) {
|
if (errno == ENOENT) {
|
||||||
error_free(local_err);
|
error_free(local_err);
|
||||||
mem_blk->can_offline = false;
|
mem_blk->can_offline = false;
|
||||||
|
@ -132,7 +132,7 @@ void alpha_cpu_unassigned_access(CPUState *cs, hwaddr addr,
|
|||||||
env->error_code = 0;
|
env->error_code = 0;
|
||||||
|
|
||||||
/* ??? We should cpu_restore_state to the faulting insn, but this hook
|
/* ??? We should cpu_restore_state to the faulting insn, but this hook
|
||||||
does not have access to the retaddr value from the orignal helper.
|
does not have access to the retaddr value from the original helper.
|
||||||
It's all moot until the QEMU PALcode grows an MCHK handler. */
|
It's all moot until the QEMU PALcode grows an MCHK handler. */
|
||||||
|
|
||||||
cpu_loop_exit(cs);
|
cpu_loop_exit(cs);
|
||||||
|
@ -224,8 +224,8 @@ typedef struct CPUARMState {
|
|||||||
};
|
};
|
||||||
/* MMU translation table base control. */
|
/* MMU translation table base control. */
|
||||||
TCR tcr_el[4];
|
TCR tcr_el[4];
|
||||||
uint32_t c2_data; /* MPU data cachable bits. */
|
uint32_t c2_data; /* MPU data cacheable bits. */
|
||||||
uint32_t c2_insn; /* MPU instruction cachable bits. */
|
uint32_t c2_insn; /* MPU instruction cacheable bits. */
|
||||||
union { /* MMU domain access control register
|
union { /* MMU domain access control register
|
||||||
* MPU write buffer control.
|
* MPU write buffer control.
|
||||||
*/
|
*/
|
||||||
|
@ -151,7 +151,7 @@ typedef struct CPUCRISState {
|
|||||||
uint32_t sregs[4][16];
|
uint32_t sregs[4][16];
|
||||||
|
|
||||||
/* Linear feedback shift reg in the mmu. Used to provide pseudo
|
/* Linear feedback shift reg in the mmu. Used to provide pseudo
|
||||||
randomness for the 'hint' the mmu gives to sw for chosing valid
|
randomness for the 'hint' the mmu gives to sw for choosing valid
|
||||||
sets on TLB refills. */
|
sets on TLB refills. */
|
||||||
uint32_t mmu_rand_lfsr;
|
uint32_t mmu_rand_lfsr;
|
||||||
|
|
||||||
|
@ -102,9 +102,9 @@ typedef struct DisasContext {
|
|||||||
|
|
||||||
int cc_size_uptodate; /* -1 invalid or last written value. */
|
int cc_size_uptodate; /* -1 invalid or last written value. */
|
||||||
|
|
||||||
int cc_x_uptodate; /* 1 - ccs, 2 - known | X_FLAG. 0 not uptodate. */
|
int cc_x_uptodate; /* 1 - ccs, 2 - known | X_FLAG. 0 not up-to-date. */
|
||||||
int flags_uptodate; /* Wether or not $ccs is uptodate. */
|
int flags_uptodate; /* Whether or not $ccs is up-to-date. */
|
||||||
int flagx_known; /* Wether or not flags_x has the x flag known at
|
int flagx_known; /* Whether or not flags_x has the x flag known at
|
||||||
translation time. */
|
translation time. */
|
||||||
int flags_x;
|
int flags_x;
|
||||||
|
|
||||||
|
@ -692,7 +692,7 @@ void mips_cpu_do_interrupt(CPUState *cs)
|
|||||||
goto set_EPC;
|
goto set_EPC;
|
||||||
case EXCP_DWATCH:
|
case EXCP_DWATCH:
|
||||||
cause = 23;
|
cause = 23;
|
||||||
/* XXX: TODO: manage defered watch exceptions */
|
/* XXX: TODO: manage deferred watch exceptions */
|
||||||
goto set_EPC;
|
goto set_EPC;
|
||||||
case EXCP_MCHECK:
|
case EXCP_MCHECK:
|
||||||
cause = 24;
|
cause = 24;
|
||||||
|
@ -588,9 +588,9 @@ int kvm_s390_set_clock(uint8_t *tod_high, uint64_t *tod_low)
|
|||||||
* @addr: the logical start address in guest memory
|
* @addr: the logical start address in guest memory
|
||||||
* @ar: the access register number
|
* @ar: the access register number
|
||||||
* @hostbuf: buffer in host memory. NULL = do only checks w/o copying
|
* @hostbuf: buffer in host memory. NULL = do only checks w/o copying
|
||||||
* @len: length that should be transfered
|
* @len: length that should be transferred
|
||||||
* @is_write: true = write, false = read
|
* @is_write: true = write, false = read
|
||||||
* Returns: 0 on success, non-zero if an exception or error occured
|
* Returns: 0 on success, non-zero if an exception or error occurred
|
||||||
*
|
*
|
||||||
* Use KVM ioctl to read/write from/to guest memory. An access exception
|
* Use KVM ioctl to read/write from/to guest memory. An access exception
|
||||||
* is injected into the vCPU in case of translation errors.
|
* is injected into the vCPU in case of translation errors.
|
||||||
|
@ -59,7 +59,7 @@ int superh_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
|
|||||||
|
|
||||||
int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
|
int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
|
||||||
{
|
{
|
||||||
/* For user mode, only U0 area is cachable. */
|
/* For user mode, only U0 area is cacheable. */
|
||||||
return !(addr & 0x80000000);
|
return !(addr & 0x80000000);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -825,11 +825,11 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
|
|||||||
|
|
||||||
/* check area */
|
/* check area */
|
||||||
if (env->sr & (1u << SR_MD)) {
|
if (env->sr & (1u << SR_MD)) {
|
||||||
/* For previledged mode, P2 and P4 area is not cachable. */
|
/* For privileged mode, P2 and P4 area is not cacheable. */
|
||||||
if ((0xA0000000 <= addr && addr < 0xC0000000) || 0xE0000000 <= addr)
|
if ((0xA0000000 <= addr && addr < 0xC0000000) || 0xE0000000 <= addr)
|
||||||
return 0;
|
return 0;
|
||||||
} else {
|
} else {
|
||||||
/* For user mode, only U0 area is cachable. */
|
/* For user mode, only U0 area is cacheable. */
|
||||||
if (0x80000000 <= addr)
|
if (0x80000000 <= addr)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -1594,7 +1594,7 @@ static void tcg_out_tb_finalize(TCGContext *s)
|
|||||||
/* The out-of-line thunks are all the same; load the return address
|
/* The out-of-line thunks are all the same; load the return address
|
||||||
from B0, load the GP, and branch to the code. Note that we are
|
from B0, load the GP, and branch to the code. Note that we are
|
||||||
always post-call, so the register window has rolled, so we're
|
always post-call, so the register window has rolled, so we're
|
||||||
using incomming parameter register numbers, not outgoing. */
|
using incoming parameter register numbers, not outgoing. */
|
||||||
if (dest == NULL) {
|
if (dest == NULL) {
|
||||||
uintptr_t *desc = (uintptr_t *)helpers[x];
|
uintptr_t *desc = (uintptr_t *)helpers[x];
|
||||||
uintptr_t func = desc[0], gp = desc[1], disp;
|
uintptr_t func = desc[0], gp = desc[1], disp;
|
||||||
|
@ -1396,7 +1396,7 @@ static void tcg_liveness_analysis(TCGContext *s)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
/* input arguments are live for preceeding opcodes */
|
/* input arguments are live for preceding opcodes */
|
||||||
for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
|
for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
|
||||||
arg = args[i];
|
arg = args[i];
|
||||||
dead_temps[arg] = 0;
|
dead_temps[arg] = 0;
|
||||||
@ -1542,7 +1542,7 @@ static void tcg_liveness_analysis(TCGContext *s)
|
|||||||
dead_args |= (1 << i);
|
dead_args |= (1 << i);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
/* input arguments are live for preceeding opcodes */
|
/* input arguments are live for preceding opcodes */
|
||||||
for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
|
for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
|
||||||
arg = args[i];
|
arg = args[i];
|
||||||
dead_temps[arg] = 0;
|
dead_temps[arg] = 0;
|
||||||
|
@ -301,7 +301,7 @@ if __name__ == '__main__':
|
|||||||
JSON:
|
JSON:
|
||||||
|
|
||||||
'--command' accepts a JSON array of commands. Each command presents
|
'--command' accepts a JSON array of commands. Each command presents
|
||||||
an application under test with all its paramaters as a list of strings,
|
an application under test with all its parameters as a list of strings,
|
||||||
e.g. ["qemu-io", "$test_img", "-c", "write $off $len"].
|
e.g. ["qemu-io", "$test_img", "-c", "write $off $len"].
|
||||||
|
|
||||||
Supported application aliases: 'qemu-img' and 'qemu-io'.
|
Supported application aliases: 'qemu-img' and 'qemu-io'.
|
||||||
|
@ -889,7 +889,7 @@ class TestRepairQuorum(iotests.QMPTestCase):
|
|||||||
target=quorum_repair_img, format=iotests.imgfmt)
|
target=quorum_repair_img, format=iotests.imgfmt)
|
||||||
self.assert_qmp(result, 'error/class', 'GenericError')
|
self.assert_qmp(result, 'error/class', 'GenericError')
|
||||||
|
|
||||||
def test_unexistant_replaces(self):
|
def test_nonexistent_replaces(self):
|
||||||
if not self.has_quorum():
|
if not self.has_quorum():
|
||||||
return
|
return
|
||||||
|
|
||||||
|
@ -389,7 +389,7 @@ void qemu_event_wait(QemuEvent *ev)
|
|||||||
/*
|
/*
|
||||||
* Leave the event reset and tell qemu_event_set that there
|
* Leave the event reset and tell qemu_event_set that there
|
||||||
* are waiters. No need to retry, because there cannot be
|
* are waiters. No need to retry, because there cannot be
|
||||||
* a concurent busy->free transition. After the CAS, the
|
* a concurrent busy->free transition. After the CAS, the
|
||||||
* event will be either set or busy.
|
* event will be either set or busy.
|
||||||
*/
|
*/
|
||||||
if (atomic_cmpxchg(&ev->value, EV_FREE, EV_BUSY) == EV_SET) {
|
if (atomic_cmpxchg(&ev->value, EV_FREE, EV_BUSY) == EV_SET) {
|
||||||
|
Loading…
Reference in New Issue
Block a user